Low-power CMOS VCO and its divide-by-2 dividers with quadrature outputs for 5 GHz/2.5 GHz WLAN transceivers

A low power CMOS VCO and its divide-by-2 dividers with quadrature outputs for 5 GHz/2.5 GHz dual band WLAN transceivers are proposed. The VCO is a differential LC oscillator based on an on-chip symmetrical spiral inductor and differential diode. Divide-by-2 dividers with quadrature outputs are implemented by using ILFD (injection-locked frequency divider) techniques. The ILFD structure is similar to that of the VCO to keep its tracking range wide enough. Inductors are optimized by using ASITIC, and differential diodes are designed by careful layout. Due to differential LC tanks and ILFD techniques, power consumption is low. The circuit is implemented in a 0.18 /spl mu/m CMOS process. HSPICE and SpectreRF simulations show that the proposed circuit could produce 5 GHz/2.5 GHz dual band LO signals with a wide tuning range with low phase noise. 2.5 GHz LO signals are quadrature with almost no phase error and no amplitude mismatching. It consumes less than 5.3 mW in the tuning range at VDD=1.5 V. The area is only 1.0/spl times/1.0 mm/sup 2/.