Data path Configuration Time Reduction for Run-time Reconfigurable Systems
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Mahmood Fazlali | Georgi Gaydadjiev | Koen Bertels | Ali Zakerolhosseini | Mojtaba Sabeghi | K. Bertels | G. Gaydadjiev | M. Fazlali | A. Zakerolhosseini | M. Sabeghi
[1] Sharad Malik,et al. Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.
[2] Mahmood Fathy,et al. A new compression based approach for reconfiguration overhead reduction in virtex based RTR systems , 2006, Comput. Electr. Eng..
[3] Cid C. de Souza,et al. The Datapath Merging Problem in Reconfigurable Systems: Lower Bounds and Heuristic Evaluation , 2004, WEA.
[4] Jari Nurmi,et al. Design Flow Instantiation for Run-Time Reconfigurable Systems: A Case Study , 2008, EURASIP J. Embed. Syst..
[5] Stephan Wong,et al. Run-Time Partial Reconfiguration for Removal, Placement and Routing on the Virtex-II Pro , 2007, 2007 International Conference on Field Programmable Logic and Applications.
[6] Miodrag Potkonjak,et al. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.
[7] Tulika Mitra,et al. Configuration bitstream compression for dynamically reconfigurable FPGAs , 2004, ICCAD 2004.
[8] Oliver Diessel,et al. Communications infrastructure generation for modular FPGA reconfiguration , 2006, 2006 IEEE International Conference on Field Programmable Technology.
[9] Markus Rullmann,et al. A cost model for partial dynamic reconfiguration , 2008, 2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation.
[10] Tulika Mitra,et al. Configuration bitstream compression for dynamically reconfigurable FPGAs , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..
[11] Cid C. de Souza,et al. The datapath merging problem in reconfigurable systems: Complexity, dual bounds and heuristic evaluation , 2005, JEAL.
[12] Majid Sarrafzadeh,et al. Optimal reconfiguration sequence management , 2003, ASP-DAC '03.
[13] Majid Sarrafzadeh,et al. An optimal algorithm for minimizing run-time reconfiguration delay , 2004, TECS.
[14] David S. Johnson,et al. Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .
[15] Morteza Saheb Zamani,et al. Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework , 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.
[16] Cid C. de Souza,et al. Efficient datapath merging for partially reconfigurable architectures , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[17] Patric R. J. Östergård,et al. A New Algorithm for the Maximum-Weight Clique Problem , 1999, Electron. Notes Discret. Math..
[18] Markus Rullmann,et al. A Cost Model for Partial Dynamic Reconfiguration , 2011, Trans. High Perform. Embed. Archit. Compil..
[19] Oliver Diessel,et al. Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices , 2007, 2007 International Conference on Field Programmable Logic and Applications.
[20] D. Kumlander,et al. A new exact algorithm for the maximum-weight clique problem based on a heuristic vertex-coloring and a backtrack search , 2022, International Journal of Global Operations Research.
[21] Zhiyuan Li,et al. Configuration management techniques for reconfigurable computing , 2002 .
[22] Scott Hauck,et al. Reconfigurable computing: a survey of systems and software , 2002, CSUR.