Derivation of test set for detecting multiple missing-gate faults in reversible circuits

Logic synthesis of reversible circuits has become an important problem because of its relevance to the emerging area of quantum computation. Special types of quantum gates such as k-CNOT may be deployed to implement a reversible circuit. Although the classical stuck-at fault model is widely used for modeling defects in conventional CMOS circuits, new approaches, namely single missing-gate fault (SMGF), repeated-gate fault (RGF), partial missing-gate fault (PMGF), and multiple missing-gate fault (MMGF), have been found to be more befitting for modeling defects in quantum k-CNOT gates. This article presents an algorithm to derive a test set (TS) for detection of multiple missing-gate faults in a reversible circuit implemented with k-CNOT gates. It is shown that TS is sufficient to detect all single missing-gate faults (SMGFs) and all detectable repeated gate faults (RGFs). Experimental results on test set for some benchmark circuits are reported, which compare favorably with earlier findings.

[1]  J. Hayes,et al.  Fault testing for reversible circuits , 2003, Proceedings. 21st VLSI Test Symposium, 2003..

[2]  Rolf Landauer,et al.  Irreversibility and heat generation in the computing process , 1961, IBM J. Res. Dev..

[3]  Marek Perkowski,et al.  Fault Localization in Reversible Circuits is Easier than for Classical Circuits , 2004 .

[4]  R. Feynman.  Quantum mechanical computers , 1986 .

[5]  Yahiko Kambayashi,et al.  Transformation rules for designing CNOT-based quantum circuits , 2002, DAC '02.

[6]  Gerhard W. Dueck,et al.  Reversible Logic Synthesis , 2020, Reversible and DNA Computing.

[7]  Hafizur Rahaman,et al.  Fault diagnosis in reversible circuits under missing-gate fault model , 2011, Comput. Electr. Eng..

[8]  John P. Hayes,et al.  A Family of Logical Fault Models for Reversible Circuits , 2005, 14th Asian Test Symposium (ATS'05).

[9]  John P. Hayes,et al.  Synthesis of reversible logic circuits , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Thierry Paul,et al.  Quantum computation and quantum information , 2007, Mathematical Structures in Computer Science.

[11]  John P. Hayes,et al.  Testing for missing-gate faults in reversible circuits , 2004, 13th Asian Test Symposium.

[12]  H. Rahaman,et al.  Optimum Test Set for Bridging Fault Detection in Reversible Circuits , 2007, 16th Asian Test Symposium (ATS 2007).

[13]  S. Lloyd.  Quantum-Mechanical Computers , 1995 .

[14]  T. Toffoli,et al.  Conservative logic , 2002, Collision-Based Computing.

[15]  Gerhard W. Dueck,et al.  Spectral Techniques for Reversible Logic Synthesis , 2002 .

[16]  R. Merkle.  Reversible electronic logic using switches , 1993 .

[17]  Tommaso Toffoli,et al.  Reversible Computing , 1980, ICALP.

[18]  Hafizur Rahaman,et al.  On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set , 2008, 21st International Conference on VLSI Design (VLSID 2008).

[19]  Anas N. Al-Rabadi.  Reversible Logic Synthesis , 2003 .

[20]  Robert K. Brayton,et al.  PLA-based regular structures and their synthesis , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[21]  Avik Chakraborty.  Synthesis of reversible circuits for testing with universal test set and C-testability of reversible iterative logic arrays , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

[22]  Parag K. Lala,et al.  A novel approach for on-line testable reversible logic circuit design , 2004, 13th Asian Test Symposium.