An accurate soft error propagation analysis technique considering temporal masking disablement
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[1] Lorenzo Alvisi,et al. Modeling the effect of technology trends on the soft error rate of combinational logic , 2002, Proceedings International Conference on Dependable Systems and Networks.
[2] B. L. Bhuva,et al. Comparison of Combinational and Sequential Error Rates for a Deep Submicron Process , 2011, IEEE Transactions on Nuclear Science.
[3] Liang Chen,et al. CEP: Correlated Error Propagation for Hierarchical Soft Error Analysis , 2013, J. Electron. Test..
[4] C. Lopez-Ongil,et al. Autonomous Fault Emulation: A New FPGA-Based Acceleration System for Hardness Evaluation , 2007, IEEE Transactions on Nuclear Science.
[5] N. Seifert,et al. Comparison of alpha-particle and neutron-induced combinational and sequential logic error rates at the 32nm technology node , 2009, 2009 IEEE International Reliability Physics Symposium.
[6] B. Ricco,et al. Estimate of signal probability in combinational logic networks , 1989, [1989] Proceedings of the 1st European Test Conference.
[7] Giovanni Squillero,et al. New techniques for speeding-up fault-injection campaigns , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.
[8] Seyed Ghassem Miremadi,et al. SCFIT: A FPGA-based fault injection technique for SEU fault model , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[9] N. Seifert,et al. Robust system design with built-in soft-error resilience , 2005, Computer.
[10] Adrian Evans,et al. Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[11] Raoul Velazco,et al. An Automated SEU Fault-Injection Method and Tool for HDL-Based Designs , 2013, IEEE Transactions on Nuclear Science.
[12] Michael Nicolaidis,et al. Soft Errors in Modern Electronic Systems , 2010 .