The members of the Committee appointed to examine the thesis of CORBIN LEIGH CHAMPION find it satisfactory and recommend that it be accepted. _____________________________ Chair _____________________________ _____________________________ iii ACKNOWLEDGMENT I would like to acknowledge all those that helped me in my research such that I have been able to achieve the things I have, soon to also include an MSEE degree. Thanks to all the great professors I have had the honor to learn from in my undergraduate and graduate courses at Washington State University. Of those, specifically, thanks to George La Rue, Associate Professor in Electrical Engineering and my advisor, for his help in courses and in my research. For funding, thanks to MOSIS for fabrication of my test chips. Thanks to Boeing for allowing us the use of their instrumentation for radiation measurements. Also, thanks A new accurate modeling technique is described that provides a SPICE model, based on the SPICE model of a standard rectangular FET, for any FET with an abnormal gate geometry, such as an annular FET. The new model uses conformal mapping to map an abnormal geometry onto a rectangular geometry. Conformal mapping has been used as a tool for this type of problem in previous research, but the new method presented splits the problem into mapping of multiple regions defined by the equal-potential lines on the rectangular gate being inverse mapped onto the given gate geometry. The length of the equal potential lines are used to define the length of the channel in a region of the gate and the spacing of equal potential lines is used along with space-charge conservation to find how the output resistance is altered by the geometry. This method for finding accurate DC models of a FET with any gate geometry was then automated making it fast and easy to use. To get correct small-signal models, as well, the necessary changes to a BSIM3 SPICE model are described taking into account the effect of geometry on the v small-signal capacitance values. The modeling of the DC behavior is shown to be accurate to better than 10% for drain current values and 11% for output resistance. Capacitance measurements agree with theory to better than 8%. The models are proven to be accurate for annular FETs and for another radiation hardened FET, which is called a horseshoe FET. Other radiation hardened FETs are also described. These FETs include gate around …
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