A multi-level static memory cell

This paper introduces a static multi-level memory cell that was conceived to store state variables in neuromorphic on-chip learning applications. It consists of a capacitance that holds a voltage and an array of 'fusing' amplifiers that are connected as followers. These followers drive their output towards the voltage level of the input like normal followers, but only if the difference between input and output is smaller than about 120 mV. The inputs to this 'fusing' follower array determine the stable voltage levels of the memory cell. All follower-outputs are connected to the storage capacitance and thus the voltage is always driven to the closest stable level. The cell content can be changed by injecting current into the capacitance. This form of storage offers arguably a better compromise between desirable and undesirable properties for neuromorphic learning systems than alternative solutions (e.g. non-volatile analog storage on floating gates or digital static storage in combination with AD/DA conversion).

[1]  S. Tam,et al.  An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses , 1990, International 1989 Joint Conference on Neural Networks.

[2]  B. A. Minch,et al.  A floating-gate MOS learning array with locally computed weight updates , 1997 .

[3]  P. Heim,et al.  Long-term CMOS static storage cell performing AD/DA conversion for analogue neural network implementations , 1994 .

[4]  Paul E. Hasler,et al.  A high-resolution non-volatile analog memory cell , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[5]  Philipp Hafliger.  A spike based learning rule and its implementation in analog hardware , 2000 .

[6]  Philipp Häfliger,et al.  Floating gate analog memory for parameter and variable storage in a learning silicon neuron , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[7]  Carver A. Mead,et al.  Neuromorphic electronic systems , 1990, Proc. IEEE.

[8]  Jin Luo,et al.  Resistive Fuses: Analog Hardware for Detecting Discontinuities in Early Vision , 1989, Analog VLSI Implementation of Neural Systems.