Timing performance for MRF-based circuits with low supply voltage

Markov Random Field (MRF) based design methodology presents a new approach to establish high noise-immune structure for ultra-low power circuit designs. The MRF design technique is able to significantly improve the reliability and interference tolerance of the logic circuits. The main idea of this methodology is that the circuit has the highest likelihood for correct logic states from the viewpoint of joint probability distribution. At present, the researches of MRF-based circuit designs focus on the circuit structure and noise tolerant performance analysis for ultra-low supply voltage applications. But there is no investigation on the timing performance of MRF-based circuits. In this paper, we simulated different well-known structures of the fundamental MRF-based elements with HSPICE, and measured the corresponding propagation delay and transition time to evaluate the timing performance of circuit. From the measurements, we find that the propagation delay of MRF-based circuits is one order bigger than that of the traditional (complementary metal oxide semiconductor) CMOS circuits, but MRF-based circuits can achieve similar transition time with traditional CMOS circuits.