An FPGA wave union TDC for time-of-flight applications

An 18-channel time-of-flight (TOF) grade time-to-digit converter (TDC) has been implemented in a low cost FPGA device. The TDC has the following unique features. (1) The time recording structures of the TDC is based on the “wave union TDC” we developed in our previous work. A leading edge of the input hit launches a bit pattern, or wave union into the delay chain-register array structure which yields two usable measurements. The two measurements effectively sub-divide timing bins for each other especially the “ultra-wide bins” caused by the FPGA logic array block (LAB) structure and improves measurement precision both in terms of maximum bin width and RMS resolution. A coarser measurement on input signal trailing edge is also provided for time-over-threshold (TOT) applications. (2) The TDC supports advanced timing reference distribution schemes that are superior to conventional common start/stop schemes. The TDC has 16 regular measurement channels plus two channels for timing reference. The timing reference is established with multiple measurements rather than single shot common start/stop. An advanced scheme, the mean-timing approach even eliminates needs of high quality timing distribution media. (3) The ASIC-like encapsulation of the FPGA TDC significantly shorten the learning curve for potential users while maintain certain flexibility for various applications. Necessary digital post-processing functions including semi-continuous automatic calibration, data buffer, data link jam prevention logic etc. are integrated into the firmware to provide a turn-key solution for users.