A 32 nm 0.58-fJ/Bit/Search 1-GHz Ternary Content Addressable Memory Compiler Using Silicon-Aware Early-Predict Late-Correct Sensing With Embedded Deep-Trench Capacitor Noise Mitigation

A Ternary Content Addressable Memory (TCAM) uses a two-phase search operation where early prediction on its pre-search results prematurely activates the subsequent main-search operation, which is later interrupted only if the final pre-search results contradict the early prediction. This early main-search activation improves performance by 30%, while the low-probability of a late-correct has a negligible impact on power consumption. This Early-Predict Late-Correct (EPLC) sensing with silicon-aware tuning enables a high-performance TCAM compiler implemented in 32 nm High-K Metal Gate SOI process to achieve 1 Gsearch/sec throughput on a 2048×640 bit TCAM instance while consuming only 0.76 W, resulting in an energy efficiency of 0.58-fJ/bit/search. Embedded Deep-Trench (DT) capacitance reduces power supply collapse by 53% while adding only 5% area overhead for a total TCAM area of 1.56 mm2 .

[1]  A. Vogel,et al.  A New Method for Improved Delay Characterization of VLSI Logic , 1982, ESSCIRC '82: Eighth European Solid-State Circuits Conference.

[2]  Yu-Jen Huang,et al.  A Low-Power Ternary Content Addressable Memory With Pai-Sigma Matchlines , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  Hoi-Jun Yoo,et al.  A 0.7-fJ/bit/search 2.2-ns search time hybrid-type TCAM architecture , 2004, IEEE Journal of Solid-State Circuits.

[4]  K. J. Schultz,et al.  Fully Parallel 30-MHz , 2 . 5-Mb CAM , 1998 .

[5]  Igor Arsovski,et al.  Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories , 2006, IEEE Custom Integrated Circuits Conference 2006.

[6]  Chein-Wei Jen,et al.  Power modeling and low-power design of content addressable memories , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[7]  Wei Hwang,et al.  A 65 nm 0.165 fJ/Bit/Search 256 $\,\times\,$144 TCAM Macro Design for IPv6 Lookup Tables , 2011, IEEE Journal of Solid-State Circuits.

[8]  Ali Sheikholeslami,et al.  A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories , 2003 .

[9]  C. A. Zukowski,et al.  Use of selective precharge for low-power on the match lines of content-addressable memories , 1997, Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. NO.97TB100159).

[10]  Igor Arsovski,et al.  Low-noise embedded CAM with reduced slew-rate match-lines and asynchronous search-lines , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[11]  Ali Sheikholeslami,et al.  A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme , 2003, IEEE J. Solid State Circuits.