Modulo Scheduling and Loop Pipelining
暂无分享,去创建一个
[1] Rajiv Gupta,et al. Efficient sequential consistency via conflict ordering , 2012, ASPLOS XVII.
[2] Software pipelining: an effective scheduling technique for VLIW machines , 1988, SIGP.
[3] Zoran Jovanovic,et al. Predicated software pipelining technique for loops with conditions , 1998, Proceedings of the First Merged International Parallel Processing Symposium and Symposium on Parallel and Distributed Processing.
[4] Guang R. Gao,et al. Software pipelining showdown: optimal vs. heuristic methods in a production compiler , 1996, PLDI '96.
[5] Vicki H. Allan,et al. Software pipelining , 1995, CSUR.
[6] Alexandre E. Eichenberger,et al. Optimum modulo schedules for minimum register requirements , 1995, ICS '95.
[7] Scott A. Mahlke,et al. Characterizing the impact of predicated execution on branch prediction , 1994, Proceedings of MICRO-27. The 27th Annual IEEE/ACM International Symposium on Microarchitecture.
[8] Guang R. Gao,et al. Minimizing register requirements under resource-constrained rate-optimal software pipelining , 1994, Proceedings of MICRO-27. The 27th Annual IEEE/ACM International Symposium on Microarchitecture.
[9] Paul Feautrier. Fine-Grain Scheduling under Resource Constraints , 1994, LCPC.
[10] Scott Mahlke,et al. Sentinel scheduling: a model for compiler-controlled speculative execution , 1993 .
[11] Alexandru Nicolau,et al. Trailblazing: A Hierarchical Approach to Percolation Scheduling , 1993, 1993 International Conference on Parallel Processing - ICPP'93.
[12] Richard A. Huff,et al. Lifetime-sensitive modulo scheduling , 1993, PLDI '93.
[13] Roger A. Bringmann,et al. Sentinel scheduling: a model for compiler-controlled speculative execution , 1992, TOCS.
[14] C. Reeves. Modern heuristic techniques for combinatorial problems , 1993 .
[15] P. Faraboschi,et al. A Non-deterministic Scheduler For A Software Pipelining Compiler , 1992, [1992] Proceedings the 25th Annual International Symposium on Microarchitecture MICRO 25.
[16] Roger A. Bringmann,et al. Effective Compiler Support For Predicated Execution Using The Hyperblock , 1992, [1992] Proceedings the 25th Annual International Symposium on Microarchitecture MICRO 25.
[17] Grant E. Haab,et al. Enhanced Modulo Scheduling For Loops With Conditional Branches , 1992, [1992] Proceedings the 25th Annual International Symposium on Microarchitecture MICRO 25.
[18] Yves Robert,et al. Proceedings of the Second Joint International Conference on Vector and Parallel Processing: Parallel Processing , 1992 .
[19] Uwe Schwiegelshohn,et al. Scheduling Loops on Parallel Processors: A Simple Algorithm with Close to Optimum Performance , 1992, CONPAR.
[20] B. Ramakrishna Rau,et al. Data Flow and Dependence Analysis for Instruction Level Parallelism , 1991, LCPC.
[21] Mike Schlansker,et al. Parallelization of loops with exits on pipelined architectures , 1990, Proceedings SUPERCOMPUTING '90.
[22] Ronald L. Rivest,et al. Introduction to Algorithms , 1990 .
[23] Barbara M. Chapman,et al. Supercompilers for parallel and vector computers , 1990, ACM Press frontier series.
[24] Peter Y.-T. Hsu,et al. Overlapped loop support in the Cydra 5 , 1989, ASPLOS III.
[25] B. Ramakrishna Rau,et al. The Cydra 5 departmental supercomputer: design philosophies, decisions, and trade-offs , 1989, Computer.
[26] Ken Kennedy,et al. Estimating Interlock and Improving Balance for Pipelined Architectures , 1988, J. Parallel Distributed Comput..
[27] P. Feautrier. Array expansion , 1988 .
[28] Alexander Aiken,et al. Optimal loop parallelization , 1988, PLDI '88.
[29] Alexander Aiken,et al. Perfect Pipelining: A New Loop Parallelization Technique , 1988, ESOP.
[30] Alex Aiken,et al. Compaction-Based Parallelization , 1988 .
[31] Kemal Ebcioglu,et al. A compilation technique for software pipelining of loops with conditional jumps , 1987, MICRO 20.
[32] Joe D. Warren,et al. The program dependence graph and its use in optimization , 1984, TOPL.
[33] Bogong Su,et al. URPR—An extension of URCR for software pipelining , 1986, MICRO 19.
[34] Peter Y.-T. Hsu,et al. Highly concurrent scalar processing , 1986, ISCA '86.
[35] Bogong Su,et al. An improvement of trace scheduling for global microcode compaction , 1984, MICRO 17.
[36] Roy F. Touzeau. A Fortran compiler for the FPS-164 scientific computer , 1984, SIGPLAN '84.
[37] Ken Kennedy,et al. Conversion of control dependence to data dependence , 1983, POPL '83.
[38] Dean Jacobs,et al. Monte Carlo techniques in code optimization , 1982, MICRO 15.
[39] Dick Eckhouse. Proceedings of the 14th annual workshop on Microprogramming, MICRO 1981, Chatham (Cape Cod), Massachusetts, USA , 1981, MICRO.
[40] B. Ramakrishna Rau,et al. Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing , 1981, MICRO 14.
[41] Alan E. Charlesworth,et al. An Approach to Scientific Array Processing: The Architectural Design of the AP-120B/FPS-164 Family , 1981, Computer.
[42] David A. Padua,et al. Dependence graphs and compiler optimizations , 1981, POPL '81.
[43] Peter M. Kogge,et al. The Architecture of Pipelined Computers , 1981 .
[44] Graham Wood,et al. Global optimization of microprograms through modular control constructs , 1979, MICRO 12.
[45] Alice C. Parker,et al. Proceedings of the 11th annual workshop on Microprogramming, MICRO 1978, Asilomar (Pacific Grove), California, USA, November 19-22, 1978 , 1978, MICRO.
[46] Mario Tokoro,et al. A technique of global optimization of microprograms , 1978, MICRO 11.
[47] Peter M. Kogge. The microprogramming of pipelined processors , 1977, ISCA '77.
[48] Narsingh Deo,et al. On Algorithms for Enumerating All Circuits of a Graph , 1976, SIAM J. Comput..
[49] James C. Tiernan,et al. An efficient search algorithm to find the elementary circuits of a graph , 1970, CACM.
[50] Richard Bellman,et al. ON A ROUTING PROBLEM , 1958 .