A 5–8 Gb/s low-power transmitter with 2-tap pre-emphasis based on toggling serialization
暂无分享,去创建一个
[1] Luca Benini,et al. 3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[2] Vladimir Stojanovic,et al. Fully Digital Transmit Equalizer With Dynamic Impedance Modulation , 2011, IEEE Journal of Solid-State Circuits.
[3] Samuel Palermo,et al. A 0.47–0.66 pJ/bit, 4.8–8 Gb/s I/O Transceiver in 65 nm CMOS , 2013, IEEE Journal of Solid-State Circuits.
[4] Samuel Palermo,et al. A 6-Gbit/s Hybrid Voltage-Mode Transmitter With Current-Mode Equalization in 90-nm CMOS , 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.
[5] Goichi Ono,et al. A 12.3-mW 12.5-Gb/s Complete Transceiver in 65-nm CMOS Process , 2010, IEEE Journal of Solid-State Circuits.
[6] Yue Lu,et al. Design and Analysis of Energy-Efficient Reconfigurable Pre-Emphasis Voltage-Mode Transmitters , 2013, IEEE Journal of Solid-State Circuits.
[7] Samuel Palermo,et al. 26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).