论文信息 - Improved read voltage margins with alternative topologies for memristor-based crossbar memories

Improved read voltage margins with alternative topologies for memristor-based crossbar memories

Memories based on hysteretic resistive materials are expected to have superior properties such as nonvolatility, low power consumption, as well as very high capacity. Crossbar arrays are considered very attractive for future ultimately scaled memories. In this paper, the memristor-based passive crossbar geometry is studied and a set of different topological patterns, which introduce insulating junctions within the memory array, is presented. In the worst-case reading scenario the simulations revealed significantly improved sensed voltage margins (up to > 4×) which alleviate the rigorous requirement for large and highperformance CMOS sensing circuits in passive crossbar memory systems.

[1] Gregory S. Snider,et al. A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology , 1998 .

[2] G. C. Sirakoulis,et al. A Novel Design and Modeling Paradigm for Memristor-Based Crossbar Circuits , 2012, IEEE Transactions on Nanotechnology.

[3] R. Rosezin,et al. High density 3D memory architecture based on the resistive switching effect , 2009 .

[4] R. Waser,et al. A Novel Reference Scheme for Reading Passive Resistive Crossbar Memories , 2006, IEEE Transactions on Nanotechnology.

[5] D. Strukov,et al. CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices , 2005 .

[6] T.G. Noll,et al. Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[7] Jiale Liang,et al. Cross-Point Memory Array Without Cell Selectors—Device Characteristics and Data Storage Pattern Dependencies , 2010, IEEE Transactions on Electron Devices.