3.7μW 0.8V VCO-integrator-based high-efficiency capacitor-free low-dropout voltage regulator

This paper presents a VCO-integrator-based high-efficiency low-dropout voltage regulator (LDO). Due to the integrator based architecture the LDO has higher efficiency, lower input voltage and better load regulation than traditional operational-amplifier based implementations. The proposed LDO was fabricated in 180nm CMOS technology along with a traditional operational-amplifier based design for comparison. The proposed LDO consumes a power of 3.7μW at 0.8V input and can achieve a drop-out voltage of 100mV and a load regulation of 8.8μV/mA. The proposed LDO is capacitor-free.

[1]  Jianping Guo,et al.  A 6-$\mu$ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology , 2010, IEEE Journal of Solid-State Circuits.

[2]  Ke-Horng Chen,et al.  A 65nm sub-1V multi-stage low-dropout (LDO) regulator design for SoC systems , 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

[3]  Chien-Hung Tsai,et al.  A low voltage and low ground current low-dropout regulator with transient enhanced circuit for SoC , 2010, The 2010 International Conference on Green Circuits and Systems.

[4]  Gabriel A. Rincon-Mora.  Analog IC Design with Low-Dropout Regulators , 2014 .

[5]  Ke-Horng Chen,et al.  17.10 0.65V-input-voltage 0.6V-output-voltage 30ppm/°C low-dropout regulator with embedded voltage reference for low-power biomedical systems , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[6]  Jianping Guo,et al.  A 6- W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology , 2022 .

[7]  Pak Kwong Chan,et al.  A Sub-1 V Transient-Enhanced Output-Capacitorless LDO Regulator With Push–Pull Composite Power Transistor , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[8]  Xiao Liang Tan,et al.  A LDO Regulator With Weighted Current Feedback Technique for 0.47 nF–10 nF Capacitive Load , 2014, IEEE Journal of Solid-State Circuits.

[9]  Pui Ying Or,et al.  An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection , 2010, IEEE Journal of Solid-State Circuits.

[10]  Jiann-Jong Chen,et al.  Sub-1V capacitor-free low-power-consumption LDO with digital controlled loop , 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.