Chapter 1 – Device Architecture

Publisher Summary This chapter describes the basic hardware elements that make up a typical field-programmable gate array (FPGA). It discusses how computation happens in an FPGA—from the blocks that do the computation to the interconnect that shuttles data from one place to another. It focuses on how these building blocks fit together in terms of FPGA architecture. It also discusses the architectures of some commercially available FPGAs. Programmable routing resources are the natural counterparts to the logic resources in an FPGA. Where the logic performs the arithmetic and logical computations, the interconnection fabric takes the results output from logic blocks and routes them as inputs to other logic blocks. By tiling logic blocks together and connecting them through a series of programmable interconnects, an FPGA can implement complex digital circuits. The true nature of spatial computing is realized by spreading the computation across the physical area of an FPGA. Modern commercially available FPGAs provide a rich variety of basic computational building blocks. With much more than simple lookup tables, the task for the FPGA architect is to decide in what proportion to provide these resources and how they should be connected. The task of the hardware designer is then to fully understand the capabilities of the target FPGAs to create designs that exploit their potential.