Analysis of Switching-Loss-Reduction Methods for MHz-Switching Buck Converters

Numbers of switching-loss-reduction methods recently proposed for MHz-switching buck converters are thoroughly investigated. From a theoretical perspective, switching loss is found to be effectively minimized by adapting the width rather than the turn-on voltage of power transistors of a buck converter. From a practical point of view, the advantage of adapting the width of power transistors becomes diminished. The amount of switching loss minimized by adapting the width of power transistors is also found to be reduced and approached to that minimized by adapting the turn-on voltage of power transistors as technology to fabricate the buck converters is continuously down scaled.

[1]  P.L. Chapman,et al.  Improvement of light-load efficiency using width-switching scheme for CMOS transistors , 2005, IEEE Power Electronics Letters.

[2]  Seth R. Sanders,et al.  An integrated controller for a high frequency buck converter , 1997, PESC97. Record 28th Annual IEEE Power Electronics Specialists Conference. Formerly Power Conditioning Specialists Conference 1970-71. Power Processing and Electronic Specialists Conference 1972.

[3]  O. Trescases,et al.  Precision gate drive timing in a zero-voltage-switching DC-DC converter , 2004, 2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs.

[4]  Tsz Yin Man,et al.  A CMOS-Control Rectifier for DiscontinuousConduction Mode Switching DC-DC Converters , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[5]  Dragan Maksimovic,et al.  Sensorless optimization of dead times in dc–dc converters with synchronous rectifiers , 2006, IEEE Transactions on Power Electronics.

[6]  Mohamed N. Darwish,et al.  The dual-gate W-switched power MOSFET: a new concept for improving light load efficiency in DC/DC converters , 1997, Proceedings of 9th International Symposium on Power Semiconductor Devices and IC's.

[7]  Wai Tung Ng,et al.  A Digitally Controlled DC-DC Converter Module with a Segmented Output Stage for Optimized Efficiency , 2006, 2006 IEEE International Symposium on Power Semiconductor Devices and IC's.

[8]  Chi-Ying Tsui,et al.  An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction , 2004 .

[9]  Charles R. Sullivan,et al.  Synchronous rectification with adaptive timing control , 1995, Proceedings of PESC '95 - Power Electronics Specialist Conference.

[10]  Vivek De,et al.  Low-voltage-swing monolithic dc-dc conversion , 2004, IEEE Transactions on Circuits and Systems II: Express Briefs.

[11]  T.H. Lee,et al.  A constant-frequency method for improving light-load efficiency in synchronous buck converters , 2005, IEEE Power Electronics Letters.