VLSI neuroprocessors for video motion detection
暂无分享,去创建一个
Rama Chellappa | Bing J. Sheu | Wai-Chi Fang | Ji-Chien Lee | R. Chellappa | B. Sheu | W. Fang | Ji-Chien Lee
[1] John Lazzaro,et al. Winner-Take-All Networks of O(N) Complexity , 1988, NIPS.
[2] Yannis Tsividis. Analog MOS integrated circuits-certain new ideas, trends, and obstacles , 1987 .
[3] Dana H. Ballard,et al. Rigid body motion from depth and optical flow , 1983, Comput. Vis. Graph. Image Process..
[4] Gilad Adiv,et al. Determining Three-Dimensional Motion and Structure from Optical Flow Generated by Several Moving Objects , 1985, IEEE Transactions on Pattern Analysis and Machine Intelligence.
[5] Carlos H. Mastrangelo,et al. A Thermal Absolute-pressure Sensor With On-chip Digital Front-end Processor , 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[6] G. Lewicki. FORESIGHT: a fast turn-around and low cost ASIC prototyping alternative , 1990, Third Annual IEEE Proceedings on ASIC Seminar and Exhibit.
[7] Stephen Grossberg. Competitive Learning: From Interactive Activation to Adaptive Resonance , 1987 .
[8] Jin Luo,et al. Computing motion using analog and binary resistive networks , 1988, Computer.
[9] S. Tam,et al. An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses , 1990, International 1989 Joint Conference on Neural Networks.
[10] Hiroki Koike,et al. A 30-ns 64-Mb DRAM with built-in self-test and self-repair function , 1992 .
[11] D. Hammerstrom,et al. A VLSI architecture for high-performance, low-cost, on-chip learning , 1990, 1990 IJCNN International Joint Conference on Neural Networks.
[12] David Zipser,et al. Feature Discovery by Competive Learning , 1986, Cogn. Sci..
[13] Y. T. Zhou,et al. Computation of optical flow using a neural network , 1988, IEEE 1988 International Conference on Neural Networks.
[14] E. Sackinger,et al. An Analog Neural Network Processor With Programmable Network Topology , 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[15] Richard F. Lyon,et al. An analog electronic cochlea , 1988, IEEE Trans. Acoust. Speech Signal Process..
[16] W. Simpson,et al. Depth Discrimination from Optic Flow , 1988, Perception.
[17] C. Tomovich,et al. MOSIS - A gateway to silicon , 1988, IEEE Circuits and Devices Magazine.
[18] Joongho Choi,et al. Analog VLSI neural network implementations of hardware annealing and winner-take-all functions , 1991, [1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems.
[19] Bing J. Sheu,et al. Hardware annealing in analog VLSI neurocomputing , 1990 .
[20] A.A. Abidi,et al. An analog CMOS network for Gaussian convolution with embedded image sensing , 1990, 1990 37th IEEE International Conference on Solid-State Circuits.
[21] Peter B. Denyer,et al. VLSI Signal Processing: A Bit-Serial Approach , 1985 .
[22] S. Ullman. The Interpretation of Visual Motion , 1979 .
[23] Y. Tamura,et al. A BiCMOS analog neural network with dynamically updated weights , 1992, 1990 37th IEEE International Conference on Solid-State Circuits.
[24] Leslie Kohn,et al. Introducing the Intel i860 64-bit microprocessor , 1989, IEEE Micro.
[25] N M Grzywacz,et al. Massively parallel implementations of theories for apparent motion. , 1988, Spatial vision.
[26] B. O'neill. Elementary Differential Geometry , 1966 .
[27] Bing J. Sheu,et al. An analog neural network processor for self-organizing mapping , 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[28] Kai Hwang,et al. Computer architecture and parallel processing , 1984, McGraw-Hill Series in computer organization and architecture.
[29] Andreas G. Andreou,et al. Current-mode subthreshold MOS circuits for analog VLSI neural systems , 1991, IEEE Trans. Neural Networks.
[30] Stephen Grossberg,et al. Competitive Learning: From Interactive Activation to Adaptive Resonance , 1987, Cogn. Sci..
[31] R. Pinkham,et al. An 11-million Transistor Neural Network Execution Engine , 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[32] Bing J. Sheu,et al. A compact and general-purpose neural chip with electrically programmable synapses , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.
[33] J. L. Pennock. Bipolar and MOS analog integrated circuit design , 1984 .
[34] Yannis Tsividis,et al. A reconfigurable VLSI neural network , 1992 .
[35] Rama Chellappa,et al. A network for motion perception , 1990, 1990 IJCNN International Joint Conference on Neural Networks.
[36] N. Kasai,et al. A 30 ns 64 Mb DRAM with built-in self-test and repair function , 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[37] Bing J. Sheu,et al. Analog floating-gate synapses for general-purpose VLSI neural computation , 1991 .
[38] Ralph Etienne-Cummings,et al. An analog neural computer with modular architecture for real-time dynamic computations , 1992 .
[39] D. J. Myers,et al. A high performance digital processor for implementing large artificial neural networks , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.
[40] C. Mead,et al. The silicon retina. , 1991, Scientific American.
[41] Bing J. Sheu,et al. VLSI neurocomputing with analog programmable chips and digital systolic array chips , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.
[42] Berthold K. P. Horn,et al. Determining Optical Flow , 1981, Other Conferences.
[43] Teuvo Kohonen,et al. Self-Organization and Associative Memory , 1988 .