Analysis on Memory-Space-Memory Clos Packet Switching Network

Memory-Space-Memory (MSM) Clos packet switching networks are the next step in scaling current crossbar switches to many hundreds or few thousands of ports. Clos networks had been studied and applied quite well in circuit switching system, with much attentions paid to its non-blocking property to decrease call blocking rates. In contrast, for packet switching systems, more care is taken to per-packet based forwarding performance of the switching networks. MSM Clos network has the merit of keeping packet sequence and therefore is quiet adapt to packet switching fabric. By way of buffering architecture, MSM Clos network is quite similar to the CIOQ Crossbar based single stage switching fabric, which promotes us to extend the results of CIOQ matching an OQ switch [1] to MSM Clos networks. Meanwhile, although the CIOQ switch can emulate an OQ switch, it needs cell insertion algorithm and stable matching algorithm with high information complexity and computing complexity. This has prevented its application seriously in new generation of routers with high speed linking rates and large port numbers. So we propose a new method of Per-Input OQ Emulation (PIOE), including both new cell insertion and scheduling algorithm (PVPP-CIP and -CSP) with only per-input local information and new matching algorithm (S3) with computing complexity of O(1), which is more practical in both CIOQ Crossbar and MSM Clos networks.

[1]  Mounir Hamdi,et al.  Analysis on the central-stage buffered Clos-network for packet switching , 2005, IEEE International Conference on Communications, 2005. ICC 2005. 2005.

[2]  Nick McKeown,et al.  The iSLIP scheduling algorithm for input-queued switches , 1999, TNET.

[3]  Mounir Hamdi,et al.  Distro: a distributed static round-robin scheduling algorithm for bufferless Clos-Network switches , 2002, Global Telecommunications Conference, 2002. GLOBECOM '02. IEEE.

[4]  L. Shapley,et al.  College Admissions and the Stability of Marriage , 1962 .

[5]  Charles Clos,et al.  A study of non-blocking switching networks , 1953 .

[6]  Abhay Parekh,et al.  A generalized processor sharing approach to flow control in integrated services networks: the single-node case , 1993, TNET.

[7]  Cheuk H. Lam,et al.  Path Switching - A Quasi-Static Routing Scheme for Large-Scale ATM Packet Switches , 1997, IEEE J. Sel. Areas Commun..

[8]  Tony T. Lee,et al.  Non-blocking routing properties of Clos networks , 1997, Advances in Switching Networks.

[9]  Weili Wu,et al.  On 3-rate rearrangeability of Clos networks , 1997, Advances in Switching Networks.

[10]  Lixia Zhang.  VirtualClock: A New Traffic Control Algorithm for Packet-Switched Networks , 1991, ACM Trans. Comput. Syst..

[11]  Hung-Hsiang Jonathan Chao,et al.  Next generation routers , 2002, Proc. IEEE.

[12]  George Varghese,et al.  Efficient fair queueing using deficit round robin , 1995, SIGCOMM '95.

[13]  Jean C. Walrand,et al.  Achieving 100% throughput in an input-queued switch , 1996, Proceedings of IEEE INFOCOM '96. Conference on Computer Communications.

[14]  Nick McKeown,et al.  Analysis of a packet switch with memories running slower than the line-rate , 2000, Proceedings IEEE INFOCOM 2000. Conference on Computer Communications. Nineteenth Annual Joint Conference of the IEEE Computer and Communications Societies (Cat. No.00CH37064).

[15]  H. Jonathan Chao,et al.  PetaStar: a petabit photonic packet switch , 2003, IEEE J. Sel. Areas Commun..

[16]  Da-Wei Wang,et al.  Lower Bounds for Wide-Sense Non-blocking Clos Network , 1998, COCOON.

[17]  Scott Shenker,et al.  Analysis and simulation of a fair queueing algorithm , 1989, SIGCOMM 1989.

[18]  Nick McKeown,et al.  Matching output queueing with a combined input/output-queued switch , 1999, IEEE J. Sel. Areas Commun..

[19]  Lixia Zhang,et al.  Virtual Clock: A New Traffic Control Algorithm for Packet Switching Networks , 1990, SIGCOMM.

[20]  H. Jonathan Chao,et al.  A petabit photonic packet switch (P/sup 3/S) , 2003, IEEE INFOCOM 2003. Twenty-second Annual Joint Conference of the IEEE Computer and Communications Societies (IEEE Cat. No.03CH37428).