Address generation for array access based on modulus m counters
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[1] Peter B. Denyer,et al. Synthesis of address generators , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[2] Peter B. Denyer,et al. Memory, control and communications synthesis for scheduled algorithms , 1991, DAC '90.
[3] Joos Vandewalle,et al. Background Memory Synthesis for Algebraic Algorithms on Multi-Processor DSP Chips , 1989 .
[4] Utz G. Baitinger,et al. Optimal state chains and state codes in finite state machines , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[5] G. Goossens,et al. CATHEDRAL II—a computer-aided synthesis system for digital signal processing VLSI systems , 1988 .