A high-performance very low-voltage current sense amplifier for nonvolatile memories

A high-performance sense amplifier for nonvolatile memories capable of working under a very low-voltage power supply is presented. The topology of the sense amplifier uses a pure current-mode comparison allowing power supplies lower than 1 V to be used and includes two subcircuits which improve slew rate performance. The sense amplifier was implemented in an EEPROM realized with a 0.18-/spl mu/m EEPROM technology. Experimental results showed a read access time of about 30 ns with a power supply of 1.65 V.

[1]  Gaetano Palumbo,et al.  A 1.5-V high drive capability CMOS op-amp , 1999 .

[2]  Y. Takano,et al.  Design of a sense circuit for low-voltage flash memories , 2000, IEEE Journal of Solid-State Circuits.

[3]  Ken Takeuchi,et al.  Circuit techniques for a 1.8-V-only NAND flash memory , 2002, IEEE J. Solid State Circuits.

[4]  Pascal Vivet,et al.  A new contactless smart card IC using an on-chip antenna and an asynchronous microcontroller , 2001 .

[5]  S. Shimizu,et al.  A 29mm/sup 2/ 1.8 V-only 16 Mb DINOR flash memory with gate-protected poly-diode (GPPD) charge pump , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

[6]  H. Watanabe,et al.  A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme , 2000, IEEE Journal of Solid-State Circuits.

[7]  T. Watanabe,et al.  A channel-erasing 1.8 V-only 32 Mb NOR flash EEPROM with a bit-line direct-sensing scheme , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[8]  K. W. Current,et al.  CMOS current comparator circuit , 1983 .

[9]  Akira Matsuzawa.  Low-voltage and low-power circuit design for mixed analog/digital systems in portable equipment , 1994 .

[10]  Anantha P. Chandrakasan,et al.  Minimizing power consumption in digital CMOS circuits , 1995, Proc. IEEE.

[11]  Kaushik Roy,et al.  Low-Power CMOS VLSI Circuit Design , 2000 .

[12]  Mohamed I. Elmasry,et al.  Low-Power Digital VLSI Design: Circuits and Systems , 1995 .

[13]  Vojin G. Oklobdzija,et al.  High-performance system design : circuits and logic , 1999 .

[14]  James B. Kuo,et al.  Low-voltage CMOS VLSI circuits , 1999 .

[15]  Tim Collins,et al.  Secure contactless smartcard ASIC with DPA protection , 2001 .

[16]  Massoud Pedram,et al.  Low power design methodologies , 1996 .

[17]  Mark Horowitz,et al.  Circuit techniques for 1.5-V power supply flash memory , 1997, IEEE J. Solid State Circuits.

[18]  G. Palumbo,et al.  High performance CMOS current comparator design , 1996 .

[19]  Luca Crippa,et al.  The flash memory read path: building blocks and critical aspects , 2003 .