Computing multiple modulo summation (abstract only): a new algorithm, its VLSI designs and applications

This paper introduces a new algorithm for an efficient computation of @@@@tj mod M, which is the fundamental operation in residue arithmetic. In addition, two hardware designs for efficient implementation of the algorithm and an application to Chinese Remainder Theorem (CRT) are developed. The proposed algorithm is fast and simple since it eliminates modulo arithmetic and the requirement of “whole word comparisons” in the operations. Instead, we take advantage of conventional binary carry save adders, simple bit checking, and dropping the overflow bits to efficiently implement the algorithm. We also introduced the use of carry save adders as our basic operation, thus shortening the iteration delays to a constant factor. Two hardware designs of the algorithm were discussed. The first approach uses minimal hardware resources with a time complexity of &Ogr;(n), where the time unit is the delay of two carry save adders. The second hardware design is a tree structured systolic network which takes advantage of n duplicated cells to perform the same problem in &Ogr;(log n) time. The CRT problem can be transformed into the problem of multiple summation modulo M by the table lookups with small address. Therefore it also can be computed in &Ogr;(log n) time units by the tree structured systolic network where n is the number of moduli of the residue system.