Testing and diagnostics of CMOS circuits using light emission from off-state leakage current

In recent years, innovative applications based on the detection of emission sources such as the light emission from off-state leakage current (LEOSLC) of CMOS transistors have been developed for testing and diagnosing modern ultralarge-scale integration circuits. In this paper, we show that LEOSLC can be used to effectively debug circuits, localize defects with a quick turn around time, read the logic state of gates, and extract the internal voltage drop of power distribution grids among others.

[1]  Alan J. Weger,et al.  Transmission line pulse picosecond imaging circuit analysis methodology for evaluation of ESD and latchup , 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

[2]  G. Woods,et al.  Backside infrared probing for static voltage drop and dynamic timing measurements , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[3]  Franco Stellari,et al.  CMOS circuit testing via time-resolved luminescence measurements and simulations , 2004, IEEE Transactions on Instrumentation and Measurement.

[4]  J. Kash,et al.  Picosecond hot electron light emission from submicron complementary metal–oxide–semiconductor circuits , 1997 .

[5]  J.A. Kash,et al.  Full chip optical imaging of logic state evolution in CMOS circuits , 1996, International Electron Devices Meeting. Technical Digest.

[6]  Edward I. Cole,et al.  Novel failure analysis techniques using photon probing with a scanning optical microscope , 1994, Proceedings of 1994 IEEE International Reliability Physics Symposium.

[7]  Franco Stellari,et al.  Optical and electrical testing of latchup in I/O interface circuits , 2003, International Test Conference, 2003. Proceedings. ITC 2003..

[8]  James McNames,et al.  Variance reduction using wafer patterns in I/sub ddQ/ data , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

[9]  Franco Motika,et al.  Diagnostic techniques for the IBM S/390 600 MHz G5 microprocessor , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[10]  A. Tosi,et al.  Hot-carrier luminescence: comparison of different CMOS technologies , 2003, ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003..

[11]  J. A. Kash,et al.  Backside optical emission diagnostics for excess I/sub DDQ/ , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[12]  G. Xiao,et al.  Optical interferometric probing of advanced microprocessors , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

[13]  P. Bai,et al.  A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 /spl mu/m/sup 2/ SRAM cell , 2002, Digest. International Electron Devices Meeting,.

[14]  Romain Desplats,et al.  Backside Hot Spot Detection Using Liquid Crystal Microscopy , 2002, Microelectron. Reliab..

[15]  Charles F. Hawkins,et al.  IDDQ testing: A review , 1992, J. Electron. Test..

[16]  S. Charbonneau,et al.  Simultaneous subnanosecond timing information and 2D spatial information from imaging photomultiplier tubes , 1987 .

[17]  Franco Stellari,et al.  Optical diagnosis of excess IDDQ in low power CMOS circuits , 2002, Microelectron. Reliab..