Physical Inspection and Attacks: An Overview
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[1] Ujjwal Guin,et al. Counterfeit Integrated Circuits , 2015 .
[2] Franco Stellari,et al. Revealing SRAM memory content using spontaneous photon emission , 2016, 2016 IEEE 34th VLSI Test Symposium (VTS).
[3] Stefan Mangard,et al. Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints , 2005, CHES.
[4] Cliff Wang,et al. Introduction to Hardware Security and Trust , 2011 .
[5] Damon L. Woodard,et al. Hardware Trust and Assurance through Reverse Engineering: A Survey and Outlook from Image Analysis and Machine Learning Perspectives , 2020, ArXiv.
[6] Mark Mohammad Tehranipoor,et al. Physical Inspection & Attacks: New Frontier in Hardware Security , 2018, 2018 IEEE 3rd International Verification and Security Workshop (IVSW).
[7] Gabriel Aeppli,et al. High-resolution non-destructive three-dimensional imaging of integrated circuits , 2017, Nature.
[8] Christopher A. Mattson,et al. The fundamentals of barriers to reverse engineering and their implementation into mechanical components , 2011 .
[9] Andrew Elliott,et al. A Decomposition Workflow for Integrated Circuit Verification and Validation , 2020, J. Hardw. Syst. Secur..
[10] Azadeh Davoodi,et al. A sensor-assisted self-authentication framework for hardware trojan detection , 2012, DATE 2012.
[11] Franco Stellari,et al. Verification of untrusted chips using trusted layout and emission measurements , 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).
[12] Assia Tria,et al. A high efficiency Hardware Trojan detection technique based on fast SEM imaging , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[13] David Naccache,et al. The Sorcerer's Apprentice Guide to Fault Attacks , 2006, Proceedings of the IEEE.
[14] Mark Mohammad Tehranipoor,et al. An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities , 2011, IEEE Transactions on Information Forensics and Security.
[15] Yuan Xiao,et al. One Bit Flips, One Cloud Flops: Cross-VM Row Hammer Attacks and Privilege Escalation , 2016, USENIX Security Symposium.
[16] Paul C. Kocher,et al. Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems , 1996, CRYPTO.
[17] Damon L. Woodard,et al. Histogram-based Auto Segmentation: A Novel Approach to Segmenting Integrated Circuit Structures from SEM Images , 2020, ArXiv.
[18] Jean-Pierre Seifert,et al. Key Extraction using Thermal Laser Stimulation: A Case Study on Xilinx Ultrascale FPGAs , 2018, IACR Cryptol. ePrint Arch..
[19] Mark Mohammad Tehranipoor,et al. Efficient and secure split manufacturing via obfuscated built-in self-authentication , 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).
[20] Mark Mohammad Tehranipoor,et al. On design vulnerability analysis and trust benchmarks development , 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).
[21] Qihang Shi,et al. A Physical Design Flow Against Front-Side Probing Attacks by Internal Shielding , 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[22] Jean-Pierre Seifert,et al. On the Power of Optical Contactless Probing: Attacking Bitstream Encryption of FPGAs , 2017, CCS.
[23] Michael Hamburg,et al. Spectre Attacks: Exploiting Speculative Execution , 2018, 2019 IEEE Symposium on Security and Privacy (SP).
[24] Mark Mohammad Tehranipoor,et al. Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead , 2014, J. Electron. Test..
[25] K. Xiao,et al. Hardware Trojans , 2016, ACM Trans. Design Autom. Electr. Syst..
[26] Navid Asadizanjani,et al. PCB Reverse Engineering Using Nondestructive X-ray Tomography and Advanced Image Processing , 2017, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[27] Jean-Pierre Seifert,et al. Emission Analysis of Hardware Implementations , 2014, 2014 17th Euromicro Conference on Digital System Design.
[28] Swarup Bhunia,et al. Hardware Trojan attacks in embedded memory , 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).
[29] Dick James,et al. The State-of-the-Art in IC Reverse Engineering , 2009, CHES.
[30] Domenic Forte,et al. RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions , 2019, 2019 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).
[31] Nidish Vashistha,et al. Trojan Scanner: Detecting Hardware Trojans with Rapid SEM Imaging Combined with Image Processing and Machine Learning , 2018, ISTFA 2018: Conference Proceedings from the 44th International Symposium for Testing and Failure Analysis.
[32] Waleed Khalil,et al. Defense-in-Depth: A Recipe for Logic Locking to Prevail , 2019, Integr..
[33] Ingrid Verbauwhede,et al. A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[34] Jean-Pierre Seifert,et al. Key Extraction Using Thermal Laser Stimulation , 2018, IACR Transactions on Cryptographic Hardware and Embedded Systems.
[35] Swarup Bhunia,et al. Hardware Security: A Hands-on Learning Approach , 2018 .
[36] Alessandro Barenghi,et al. Low Voltage Fault Attacks on the RSA Cryptosystem , 2009, 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC).
[37] E. L. Principe,et al. Steps Toward Automated Deprocessing of Integrated Circuits , 2017 .
[38] Nikolaos G. Bourbakis,et al. A survey on reverse engineering of technical diagrams , 2016, 2016 7th International Conference on Information, Intelligence, Systems & Applications (IISA).
[39] Jian Ma,et al. Hierarchical Dynamic Thermal Management Method for High-Performance Many-Core Microprocessors , 2016, ACM Trans. Design Autom. Electr. Syst..
[40] Jean-Pierre Seifert,et al. Breaking and entering through the silicon , 2013, CCS.
[41] Douglas B. Fuller. Chip Design in China and India: Multinationals, Industry Structure and Development Outcomes in the Integrated Circuit Industry , 2014 .
[42] Mark Mohammad Tehranipoor,et al. A layout-aware approach for improving localized switching to detect hardware Trojans in integrated circuits , 2010, 2010 IEEE International Workshop on Information Forensics and Security.
[43] Paul C. Kocher,et al. Differential Power Analysis , 1999, CRYPTO.
[44] Sayak Ray,et al. Evaluating the security of logic encryption algorithms , 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).
[45] Jean-Pierre Seifert,et al. Differential Photonic Emission Analysis , 2013, COSADE.
[46] Farinaz Koushanfar,et al. A Survey of Hardware Trojan Taxonomy and Detection , 2010, IEEE Design & Test of Computers.
[47] Mark Mohammad Tehranipoor,et al. A Survey on Chip to System Reverse Engineering , 2016, JETC.
[48] Qihang Shi,et al. Probing Assessment Framework and Evaluation of Antiprobing Solutions , 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[49] Mark Mohammad Tehranipoor,et al. AVFSM: A framework for identifying and mitigating vulnerabilities in FSMs , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[50] Romain Desplats,et al. Oxide charge measurements in EEPROM devices , 2005, Microelectron. Reliab..
[51] Michael Tunstall,et al. SoC It to EM: ElectroMagnetic Side-Channel Attacks on a Complex System-on-Chip , 2015, CHES.