High Frequency Buck Converter Design Using Time-Based Control Techniques

Time-based control techniques for the design of high switching frequency buck converters are presented. Using time as the processing variable, the proposed controller operates with CMOS-level digital-like signals but without adding any quantization error. A ring oscillator is used as an integrator in place of conventional opamp-RC or G m-C integrators while a delay line is used to perform voltage to time conversion and to sum time signals. A simple flip-flop generates pulse-width modulated signal from the time-based output of the controller. Hence time-based control eliminates the need for wide bandwidth error amplifier, pulse-width modulator (PWM) in analog controllers or high resolution analog-to-digital converter (ADC) and digital PWM in digital controllers. As a result, it can be implemented in small area and with minimal power. Fabricated in a 180 nm CMOS process, the prototype buck converter occupies an active area of 0.24 mm2, of which the controller occupies only 0.0375 mm2. It operates over a wide range of switching frequencies (10-25 MHz) and regulates output to any desired voltage in the range of 0.6 V to 1.5 V with 1.8 V input voltage. With a 500 mA step in the load current, the settling time is less than 3.5 μs and the measured reference tracking bandwidth is about 1 MHz. Better than 94% peak efficiency is achieved while consuming a quiescent current of only 2 μA/MHz.

[1]  Jian Sun,et al.  Ripple-Based Control of Switching Regulators—An Overview , 2009, IEEE Transactions on Power Electronics.

[2]  Michael H. Perrott,et al.  A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time � ADC With VCO-Based Integrator and Quantizer Implemented in 0 . 13 � m CMOS , 2009 .

[3]  Vivek De,et al.  A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS , 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

[4]  Wing-Hung Ki,et al.  A 10/30 MHz Fast Reference-Tracking Buck Converter With DDA-Based Type-III Compensator , 2014, IEEE Journal of Solid-State Circuits.

[5]  Robert W. Erickson,et al.  Fundamentals of Power Electronics , 2001 .

[6]  Seth R. Sanders,et al.  Quantization resolution and limit cycling in digitally controlled PWM converters , 2003 .

[7]  Song Jia,et al.  A power clamp circuit using current mirror for on-chip ESD protection , 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

[8]  Seth R. Sanders,et al.  Converter IC for Cellular Phone Applications , 2004 .

[9]  Philip K. T. Mok,et al.  A Fast Fixed-Frequency Adaptive-On-Time Boost Converter With Light Load Efficiency Enhancement and Predictable Noise Spectrum , 2013, IEEE Journal of Solid-State Circuits.

[10]  R.W. Brodersen,et al.  A dynamic voltage scaled microprocessor system , 2000, IEEE Journal of Solid-State Circuits.

[11]  Bertan Bakkaloglu,et al.  A 300mA 14mV-ripple digitally controlled buck converter using frequency domain ΔΣ ADC and hybrid PWM generator , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[12]  H. Venable,et al.  THE K FACTOR : A NEW MATHEMATICAL TOOL FOR STABILITY ANALYSIS AND SYNTHESIS , 2022 .

[13]  Amr Elshazly,et al.  A 900mA 93% efficient 50µA quiescent current fixed frequency hysteretic buck converter using a highly digital hybrid voltage- and current-mode control , 2012, 2012 Symposium on VLSI Circuits (VLSIC).

[14]  Justin Gaither,et al.  A robust digital DC-DC converter with rail-to-rail output range in 40nm CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[15]  S. Sanders,et al.  An Analog CMOS Double-Edge Multi-Phase Low-Latency Pulse Width Modulator , 2007, APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition.

[16]  Pavan Kumar Hanumolu,et al.  Analog Filter Design Using Ring Oscillator Integrators , 2012, IEEE Journal of Solid-State Circuits.

[17]  Menglian Zhao,et al.  Self-adaptive window control technique for hysteretic buck converter with constant frequency , 2012, 2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC).

[18]  A.V. Peterchev,et al.  A 4-/spl mu/a quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications , 2004, IEEE Journal of Solid-State Circuits.

[19]  M.H. Perrott,et al.  A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time $\Delta\Sigma$ ADC With VCO-Based Integrator and Quantizer Implemented in 0.13 $\mu$m CMOS , 2009, IEEE Journal of Solid-State Circuits.

[20]  Amr Elshazly,et al.  A 10–25MHz, 600mA buck converter using time-based PID compensator with 2µA/MHz quiescent current, 94% peak efficiency, and 1MHz BW , 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

[21]  Pengfei Li,et al.  A 90–240 MHz Hysteretic Controlled DC-DC Buck Converter With Digital Phase Locked Loop Synchronization , 2011, IEEE Journal of Solid-State Circuits.