Analysis of power supply interference effects on quasi-digital sensors

Quasi-digital sensors are very common and attractive for new designs because their time-based output signal can be directly connected to a digital system with time measurement capability. However, the same as modulating sensors, quasi-digital sensors are susceptible to power supply interference. Their data sheets specify a power supply rejection ratio (PSRR) value, but it often refers only to the effects on the bias error produced by a slow power supply voltage change. This paper provides a theoretical analysis of the effects of power supply interference on the output information of quasi-digital sensors. According to the developed models, the uncertainty in the output information depends on the frequency and the amplitude of the interference superimposed on the supply voltage. Furthermore, the sensor sensitivity to power supply interference also depends on the measurand. The proposed models are qualitatively validated with experimental data from commercial sensors based on pulse-frequency modulation (PFM).