An Energy-Efficient Reconfigurable Baseband Processor for Flexible Radios

Most existing techniques for reconfigurable processors focus on the computation model. This paper focuses on increasing the granularity of configurable units without compromising flexibility. This is carried out by matching the granularity to the degree-of-freedom (DOF) processing in most wireless systems. A design flow that accelerates the exploration of tradeoffs among various micro-architecture for the configurable unit is discussed. A prototype processor is implemented using the Intel 0.13 mum CMOS low-power standard cell library. The estimated energy efficiency is on the same order of dedicated hardware implementations

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