RTP for advanced CMOS process integration

Twelve rapid thermal processes have been developed for over fifteen critical thermal fabrication steps in a sub-0.50 p.m CMOS technology. These processes include dielectric growth (dry and wet rapid thermal oxidations), thermal anneals (source/drain & gate anneals, CMOS well formation, TiN/TiSi2 react, and forming gas anneal), rapid thermal chemical-vapor deposition (amorphous silicon, polysilicon, tungsten, silicon dioxide, and silicon nitride), and in-situ dry cleaning. The pro­ cess temperature range of these rapid thermal processing fabrication steps extends between 400°C and 1100°C. Complete sub-0.50 p.m CMOS process integration has been successfully demonstrated in a single-wafer minifactory consisting of all-RTP/no-furnace thermal processing.