A high linear voltage-to-time converter (VTC) with 1.2 V input range for time-domain analog-to-digital converters
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[1] Hamed Aminzadeh,et al. A low-voltage high-speed high-linearity MOSFET-only analog bootstrapped switch for sample-and-hold circuits , 2015, 2015 2nd International Conference on Knowledge-Based Engineering and Innovation (KBEI).
[2] Yun Chiu,et al. A 0.073-mm2 10-GS/s 6-bit time-domain folding ADC in 65-nm CMOS with inherent DEM , 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).
[3] Kenichi Okada,et al. 22.6 A 2.2GS/s 7b 27.4mW time-based folding-flash ADC with resistively averaged voltage-to-time amplifiers , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).
[4] Peiman Aliparast,et al. A 12-Bit 1-Gsample/s Nyquist Current-Steering DAC in 0.35 µm CMOS for Wireless Transmitter , 2011, Circuits Syst..
[5] Chris H. Kim,et al. A fully-digital beat-frequency based ADC achieving 39dB SNDR for a 1.6mVpp input signal , 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.
[6] Kenichi Ohhata. A 2.3-MW, 950-MHz, 8-Bit Fully-Time-Based Subranging ADC Using Highly-Linear Dynamic VTC , 2018, 2018 IEEE Symposium on VLSI Circuits.
[7] Yuhua Guo,et al. High-Voltage Analog Circuit Design using Thin-Oxide MOS Devices only , 2007, 2007 IEEE International Symposium on Circuits and Systems.
[8] Subhanshu Gupta,et al. A highly linear 4GS/s uncalibrated voltage-to-time converter with wide input range , 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).
[9] Leonid Belostotski,et al. A 5GS/s 4-bit time-based single-channel CMOS ADC for radio astronomy , 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.
[10] Un-Ku Moon,et al. A Time-Based Pipelined ADC Using Both Voltage and Time Domain Information , 2014, IEEE Journal of Solid-State Circuits.
[11] Hassan Mostafa,et al. A 200MS/s, 8-bit Time-based Analog to Digital Converter (TADC) in 65nm CMOS technology , 2016, 2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC).
[12] Makoto Nagata,et al. A 500MHz-BW −52.5dB-THD Voltage-to-Time Converter utilizing a two-step transition inverter , 2016, ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference.
[13] Gordon W. Roberts,et al. Delta–Sigma A/D Conversion Via Time-Mode Signal Processing , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[14] Yun Chiu,et al. A Skew-Free 10 GS/s 6 bit CMOS ADC With Compact Time-Domain Signal Folding and Inherent DEM , 2016, IEEE Journal of Solid-State Circuits.
[15] Mohammad Chahardori,et al. A Low-Power, Bootstrapped Sample and Hold Circuit with Extended Input Ranged for Analog-to-Digital Converters in CMOS 0.18 μm , 2018, 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).
[16] Weili Han,et al. A highly linear voltage-to-time converter with variable conversion gain for time-based ADCs , 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).
[17] Hassan Mostafa,et al. A 1 GS/s 6-bit time-based analog-to-digital converter (T-ADC) for front-end receivers , 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).
[18] Hassan Mostafa,et al. A new design methodology for Voltage-to-Time Converters (VTCs) circuits suitable for Time-based Analog-to-Digital Converters (T-ADC) , 2014, 2014 27th IEEE International System-on-Chip Conference (SOCC).
[19] Chih-Cheng Hsieh,et al. A 2.02–5.16 fJ/Conversion Step 10 Bit Hybrid Coarse-Fine SAR ADC With Time-Domain Quantizer in 90 nm CMOS , 2016, IEEE Journal of Solid-State Circuits.
[20] Hassan Mostafa,et al. An ultra-low power voltage-to-time converter (VTC) circuit for low power and low speed applications , 2016, 2016 29th IEEE International System-on-Chip Conference (SOCC).