A rule-based approach for improving allocation of filter structures in HLS

A rule based allocator for improving synthesis of filter systems is presented. The principles of the Enhanced AIlocation Rule Language Interpreter (EARLI) are presented. Possible transformations, optimisations and how to express them in EARLI are discussed. Experiments show that relative area gains ranging from 5 to 44%, depending on the chosen target technology, can be achieved using the designers knowledge about the design class. Experiments also indicate that employing direct mapping of CDFG subgraphs onto preoptimised RTL-level macroblocks would have resulted in a relative area gain of 500%. The macroblock had only 16% of the area produced by the HLS-tool.

[1]  Miodrag Potkonjak,et al.  Estimating implementation bounds for real time DSP application specific circuits , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Daniel Gajski,et al.  Chippe: a system for constraint driven behavioral synthesis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Nikil Dutt,et al.  RT Component Sets for High-Level Design Applications , 1997 .

[4]  H. Tenhunen,et al.  HLS based DSP optimization with ASIC RTL libraries , 1994, Proceedings of 1994 IEEE Workshop on VLSI Signal Processing.

[5]  H. Tenhunen,et al.  High level synthesis in DSP ASIC optimization , 1994, Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit.

[6]  Michael C. McFarland,et al.  Incorporating bottom-up design into hardware synthesis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  David W. Knapp,et al.  The ADAM design planning engine , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  H. Tenhunen,et al.  VLSI-realizable multiplier-free interpolators for high-order sigma-delta D/A converters , 1991, [1991 Proceedings] 6th Mediterranean Electrotechnical Conference.

[9]  Axel Jantsch,et al.  BABBAGE - A Rule basedtool for synthesis of hardware systems , 1994 .

[10]  Thaddeus Julius Kowalski The VLSI design automation assistant : a knowledge-based expert system , 1986 .

[11]  Jayaram Bhasker,et al.  An optimizer for hardware synthesis , 1990, IEEE Design & Test of Computers.

[12]  Hugo De Man,et al.  High-level synthesis for real-time digital signal processing , 1993, The Kluwer international series in engineering and computer science.

[13]  O. Vainio,et al.  Fast implementation of stack filters with vhdl-based synthesis and fpgas , 1993, IEEE Winter Workshop on Nonlinear Digital Signal Processing.

[14]  Miodrag Potkonjak,et al.  Optimizing resource utilization using transformations , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..