Out of Thin Air: Energy Scavenging and the Path to Ultralow-Voltage Operation
暂无分享,去创建一个
[1] David Blaauw,et al. Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[2] M. P. Flynn,et al. Digital calibration incorporating redundancy of flash ADCs , 2003, IEEE Trans. Circuits Syst. II Express Briefs.
[3] A. Chandrakasan,et al. A 180-mV subthreshold FFT processor using a minimum energy design methodology , 2005, IEEE Journal of Solid-State Circuits.
[4] Uming Ko,et al. A 28 nm 0.6 V Low Power DSP for Mobile Applications , 2012, IEEE Journal of Solid-State Circuits.
[5] Anantha Chandrakasan,et al. A resolution-reconfigurable 5-to-10b 0.4-to-1V power scalable SAR ADC , 2011, 2011 IEEE International Solid-State Circuits Conference.
[6] Denis C. Daly,et al. A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator Redundancy , 2009, IEEE Journal of Solid-State Circuits.
[7] H. Mair,et al. A 65-nm Mobile Multimedia Applications Processor with an Adaptive Power Management Scheme to Compensate for Variations , 2007, 2007 IEEE Symposium on VLSI Circuits.
[8] Jie Gu,et al. Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[9] Naveen Verma,et al. A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[10] Anantha Chandrakasan,et al. Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages down to 250mV in 65nm CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[11] Sanu Mathew,et al. A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS , 2009, IEEE Journal of Solid-State Circuits.
[12] Anantha Chandrakasan,et al. A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications , 2013, IEEE Journal of Solid-State Circuits.
[13] J. Fellrath,et al. CMOS analog integrated circuits based on weak inversion operations , 1977 .
[14] Uming Ko,et al. A 45nm 3.5G Baseband-and-Multimedia Application Processor using Adaptive Body-Bias and Ultra-Low-Power Techniques , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[15] Yu Pu. An Ultra-Low-Energy Multi-Standard JPEG Co-Processor in 65 nm CMOS With Sub/Near Threshold Supply Voltage , 2010 .
[16] P. Royannez,et al. Techniques for Wireless Applications , 2005 .
[17] Yajun Ha,et al. An Ultra-Low-Energy Multi-Standard JPEG Co-Processor in 65 nm CMOS With Sub/Near Threshold Supply Voltage , 2010, IEEE Journal of Solid-State Circuits.
[18] Anantha Chandrakasan,et al. A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder , 2009, IEEE Journal of Solid-State Circuits.
[19] Eric A. Vittoz. The Electronic Watch and Low-Power Circuits , 2008, IEEE Solid-State Circuits Newsletter.