C-testable bit parallel multipliers over GF(2m)
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[1] Dhiraj K. Pradhan. A Theory of Galois Switching Functions , 1978, IEEE Transactions on Computers.
[2] Thomas Beth,et al. Arithmetic Operations in GF(2 m ). , 1993 .
[3] Xuemin Chen,et al. Error-Control Coding for Data Networks , 1999 .
[4] Richard E. Blahut. Fast Algorithms for Signal Processing and Error Control , 1985 .
[5] Hafizur Rahaman,et al. Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults , 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).
[6] Edoardo D. Mastrovito,et al. VLSI Designs for Multiplication over Finite Fields GF (2m) , 1988, AAECC.
[7] M. Anwar Hasan,et al. Efficient Exponentiation of a Primitive Root in GF(2^m) , 1997, IEEE Trans. Computers.
[8] Chien-Ming Wu,et al. High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m) , 2004, IEEE Trans. Computers.
[9] Hafizur Rahaman,et al. Easily testable realization of GRM and ESOP networks for detecting stuck-at and bridging faults , 2004, 17th International Conference on VLSI Design. Proceedings..
[10] John P. Hayes,et al. Design of Easily Testable Bit-Sliced Systems , 1981, IEEE Transactions on Computers.
[11] Hafizur Rahaman,et al. Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults , 2004 .
[12] Hai Zhou,et al. Parallel CAD: Algorithm Design and Programming Special Section Call for Papers TODAES: ACM Transactions on Design Automation of Electronic Systems , 2010 .
[13] M. Anwar Hasan,et al. Low complexity bit parallel architectures for polynomial basis multiplication over GF(2m) , 2004, IEEE Transactions on Computers.
[14] Chin-Liang Wang,et al. Systolic Array Implementation o Euclid's Algorithm for Inversion and Division in GF(2m) , 1998, IEEE Trans. Computers.
[15] T. Gulliver,et al. The generation of rimitive olynomials in GF(q) with independent roots and their applications for ower residue codes, VLSI testing and finite field multipliers using normal basis , 1991 .
[16] Allan O. Steinhardt,et al. Fast algorithms for digital signal processing , 1986, Proceedings of the IEEE.
[17] Fabrizio Lombardi,et al. Constant testability of combinational cellular tree structures , 1992, J. Electron. Test..
[18] Bernd Becker,et al. Optimal-time multipliers and C-testability , 1990, SPAA '90.
[19] Stafford E. Tavares,et al. Architectures for exponentiation in GF(2m) , 1988, IEEE J. Sel. Areas Commun..
[20] Cheng-Wen Wu,et al. High-speed C-testable systolic array design for Galois-field inversion , 1997, Proceedings European Design and Test Conference. ED & TC 97.
[21] Dhiraj K. Pradhan,et al. Easily Testable Implementation for Bit Parallel Multipliers in GF (2m) , 2006, 2006 IEEE International High Level Design Validation and Test Workshop.
[22] Harald Niederreiter,et al. Introduction to finite fields and their applications: List of Symbols , 1986 .
[23] Thomas Beth,et al. Arithmetic operations inGF(2m) , 1993, Journal of Cryptology.
[24] Saman Adham,et al. Scan-based BIST fault diagnosis , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[25] Melvin A. Breuer,et al. Digital systems testing and testable design , 1990 .