Timing and power measurement in static software analysis

Evaluation boards are popular as prototyping platforms in embedded software development. They are often preferred over simulation to avoid modeling effort and simulation time as well as over complete hardware prototypes to reduce development cost. The paper presents the application of a commercial logic state analyzer for timed trace acquisition with instruction cycle accurate software power measurement on commercial evaluation kits. The results are applied in an instruction level software power analysis technique. Both approaches can be used for segment-wise architecture modeling in static software analysis approaches.

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