An automatic fully-digital pulse frequency modulation (PFM) to pulse width modulation (PWM) mode transition scheme for digitally controlled DC-DC buck converter is proposed in this paper. The meta-stability issues of time-based analog-to-digital converter (ADC) which result in incorrect loop control and output voltage artifacts are also addressed in the proposed design. The digital controller is designed and fabricated on a 0.18 μm 6 layer-metal CMOS technology with an active area of 1.61 mm2. The converter operates at a switching frequency of 1 MHz and supports a regulated output voltage ranging from 0.9 V to 3.3 V for an input voltage range between 3.3 V to 5 V. The converter can supply a maximum load current of 7.5 A, and has the peak efficiency of 95.56%.