Electro-thermal and Logi-thermal Simulators aimed at the Temperature-aware Design of Complex Integrated Circuits

With the increasing power dissipation increasing attention has been paid to the thermal issues in electronics design on system, board, package and chip level, including electrothermal simulation of even rather complex integrated circuits. Two distinct algorithmic directions can be distinguished in electro-thermal simulation: the simulator coupling and the simultaneous iteration or direct method. In our view the direct method is well suited for electro-thermal simulation of analog circuit blocks while simulator coupling can be used to implement logi-thermal simulation. In case of complex designs containing digital and analog blocks the two approaches can also be combined. Ideally thermal, electro-thermal and logi-thermal simulation of a circuit is performed already in the phase of conceptual design when only a rough idea exists about the final physical realization of the circuit. In any case, effect of the thermal boundary conditions of the die+package, cooling via the electrical connections to the die and the granularity of the simulation should be carefully considered.

[1]  Andras Poppe,et al.  Electro-thermal simulation: a realization by simultaneous iteration , 1997 .

[2]  Sung-Mo Kang,et al.  Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress , 1998, ICCAD '98.

[3]  Márta Rencz,et al.  Electro-thermal and logi-thermal simulation of VLSI designs , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Andras Poppe,et al.  THERMAN: a thermal simulation tool for IC chips, microstructures and PW boards , 2000 .

[5]  Sung-Mo Kang,et al.  ETS-A: a new electrothermal simulator for CMOS VLSI circuits , 1996, Proceedings ED&TC European Design and Test Conference.

[6]  Andras Poppe,et al.  Electro-thermal simulation for the prediction of chip operation within the package , 2003, Ninteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium, 2003..

[7]  B. Courtois,et al.  Proceedings on 9th International Workshop on THERMAL INVESTIGATIONS of ICs and Systems (THERMINIC 2003), 24-26 September 2003, Aix-en-Provence, France , 2003 .

[8]  T. Kemper,et al.  Ultrafast Temperature Profile Calculation in Ic Chips , 2006 .

[9]  Andras Poppe,et al.  THE SISSY ELECTRO-THERMAL SIMULATION SYSTEM - BASED ON MODERN SOFTWARE TECHNOLOGIES , 2005 .

[10]  J. E. Solomon,et al.  The monolithic op amp: a tutorial study , 1974 .

[11]  B. Geeraerts,et al.  Electrothermal simulation and design of integrated circuits , 1994, IEEE J. Solid State Circuits.

[12]  A. Bontemps,et al.  Realistic and efficient simulation of electro-thermal effects in VLSI circuits , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[13]  S. Lindenkreuz,et al.  Fully coupled dynamic electro-thermal simulation , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[14]  David J. Allstot,et al.  Electrothermal simulation of integrated circuits , 1993 .

[15]  Andras Poppe,et al.  Design and Evaluation of a Grassfire Skeletonization Chip , 1999 .

[16]  Vladimir Szekely Accurate calculation of device heat dynamics: a special feature of the TRANS-TRAN circuit-analysis program , 1973 .