High transmission performance integrated antennas on SOI substrate for VLSI wireless interconnects
暂无分享,去创建一个
J. Torres | F. Ndagijimana | P. Benech | C. Raynaud | C. Tinella | A. Farcy | O. Exshaw | O. Richard | A. Triantafyllou
[1] K.O. Kenneth,et al. A 15-GHz wireless interconnect implemented in a 0.18-/spl mu/m CMOS technology using integrated transmitters, receivers, and antennas , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).
[2] Kaustav Banerjee,et al. Multiple Si layer ICs: motivation, performance analysis, and design implications , 2000, Proceedings 37th Design Automation Conference.
[3] Constantine A. Balanis,et al. Antenna Theory: Analysis and Design , 1982 .
[4] Xiaoling Guo,et al. Propagation layers for intra-chip wireless interconnection compatible with packaging and heat removal , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).
[5] Nicolaos G. Alexopoulos,et al. On the effect of substrate thickness and permittivity on printed circuit dipole properties , 1982 .
[6] D. Miller,et al. Optical interconnects to silicon , 2000, IEEE Journal of Selected Topics in Quantum Electronics.
[7] K.K. O,et al. On-chip wireless interconnection with integrated antennas , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).