Development of an optimised 40 V pDMOS device by use of a TCAD design of experiment methodology

A new medium voltage (40-60 V) pDMOS device has been developed and optimized through the use of a design of experiment (DOE) approach based on TCAD simulations and experimental verification. Layout parameters are varied and the electrical characteristics of the device (e.g. V/sub bd/, specific on-resistance, etc.) together with hot carrier behaviour, are studied as responses. In this way, an optimal device was selected.

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