High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using $\hbox{HfO}_{2}/\hbox{Al}_{2}\hbox{O}_{3}/\hbox{GeO}_{x}/\hbox{Ge}$ Gate Stacks Fabricated by Plasma Postoxidation

An ultrathin equivalent oxide thickness (EOT) HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>/Ge gate stack has been fabricated by combining the plasma postoxidation method with a 0.2-nm-thick Al<sub>2</sub>O<sub>3</sub> layer between HfO<sub>2</sub> and Ge for suppressing HfO<sub>2</sub>-GeO<i>x</i> intermixing, resulting in a low-interface-state-density (<i>D</i><sub>it</sub>) GeO<i>x</i>/Ge metal-oxide-semiconductor (MOS) interface. The EOT of these gate stacks has been scaled down to 0.7-0.8 nm with maintaining the <i>D</i><sub>it</sub> in 10<sup>11</sup> cm<sup>-2</sup>·eV<sup>-1</sup> level. The p- and n-channel MOS field-effect transistors (MOSFETs) (p- and n-MOSFETs) using this gate stack have been fabricated on (100) Ge substrates and exhibit high hole and electron mobilities. It is found that the Ge p- and n-MOSFETs exhibit peak hole mobilities of 596 and 546 cm<sup>2</sup>/V·s and peak electron mobilities of 754 and 689 cm<sup>2</sup>/V·s at EOTs of 0.82 and 0.76 nm, respectively, which are the record-high reports so far for Ge MOSFETs in subnanometer EOT range because of the sufficiently passivated Ge MOS interfaces in present HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>/GeO<i>x</i>/Ge gate stacks.

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