A novel source-body biasing technique for RF to DC voltage multipliers in 0.18µm CMOS technology

This paper presents a novel source-body biasing technique for RF to DC voltage multipliers designed in 0.18 µm CMOS Technology for applications where CMOS integration is required. The proposed technique increases voltage gain and efficiency by cancelling body effect and reverse leakage currents. Simulation results using HSPICE software are presented to verify and illustrate the technique by applying it to different topologies tested at different frequencies. Results show that Peak Conversion Efficiencies (PCE) as high as 16.7% can be achieved.

[1]  C. Dehollain,et al.  Remotely powered addressable UHF RFID integrated system , 2005, IEEE Journal of Solid-State Circuits.

[2]  Rainer Kokozinski,et al.  A UHF voltage multiplier circuit using a threshold-voltage cancellation technique , 2009, 2009 Ph.D. Research in Microelectronics and Electronics.

[3]  A. Sedra.  Microelectronic circuits , 1982 .

[4]  Qiuting Huang,et al.  A 0.5mW passive telemetry IC for biomedical applications , 1998, Proceedings of the 23rd European Solid-State Circuits Conference.

[5]  Kamal El-Sankary,et al.  Enhanced RF to DC CMOS rectifier with capacitor-bootstrapped transistor , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[6]  Robert Weigel,et al.  A highly efficient UHF RFID frontend approach , 2009, 2009 IEEE MTT-S International Microwave Workshop on Wireless Sensing, Local Positioning, and RFID.

[7]  Jie Wu,et al.  A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF–DC Rectifier , 2009, IEEE Transactions on Industrial Electronics.

[8]  Chi-Ying Tsui,et al.  Analysis and Design Strategy of UHF Micro-Power CMOS Rectifiers for Micro-Sensor and RFID Applications , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.