A methodology for rapid prototyping of real-time image processing VLSI systems

A methodology aimed at prototyping real-time image processing VLSI systems is presented. The prototyping methodology includes the emulation of the application in its target environment (i.e., in real time and on real-world scenes) and the automatic derivation of a VLSI chip-set implementing the application. Our methodology is based on a custom emulator called the Data-Flow Functional Computer (DFFC) which is dedicated to real-time image processing. Our method encompasses in a coherent environment: the validation of the high level specification; the simultaneous validation of an implementation of the design suitable for integration; and a method for integrating the validated emulator architecture as a VLSI system. The results of the successful prototyping of a defect detector algorithm are presented.

[1]  A. Lynn Abbott,et al.  Image Processing on a Custom Computing Platform , 1994, FPL.

[2]  Régis Leveugle,et al.  Generation of optimized datapaths: bit-slice versus standard cells , 1992, Synthesis for Control Dominated Circuits.

[3]  Virginia H. Brecher.  New techniques for patterned wafer inspection based on a model of human preattentive vision , 1992, Defense, Security, and Sensing.

[4]  Arindam Saha,et al.  Some design issues in multi-chip FPGA implementation of DSP algorithms , 1994, Proceedings of IEEE 5th International Workshop on Rapid System Prototyping.

[5]  Georges Quénot,et al.  High Level Synthesis by Systematic Derivation of Vision Automata from Emulation Results , 1995 .

[6]  G.M. Quenot,et al.  A reconfigurable compute engine for real-time vision automata prototyping , 1994, Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines.