A Dual-Channel Ferroelectric-Gate Field-Effect Transistor Enabling nand -Type Memory Characteristics

We demonstrate here an oxide memory (OxiM) transistor as a new type of ferroelectric-gate field-effect transistor (FeFET), provided with a dual (top and bottom) channel, which can memorize channel conductance with a dynamic range exceeding 104. This new transistor consists entirely of the following oxide-based thin films: SrRuO3 (bottom gate electrode); Pb(Zr, Ti)O3 (ferroelectric); ZnO (semiconductor); and SiON (gate insulator). A notable feature of the OxiM transistor is that two types of FET, i.e., a top gate-type thin-film transistor (top-TFT) and a bottom gate-type FeFET (bottom-FeFET), are stacked with a conduction layer of thin ZnO film in common. The channel conductance of the top-TFT and the bottom-FeFET can be controlled independently by the top gate and the bottom gate, respectively. We were successful in fabricating a nand memory circuit using serially connected OxiM transistors. The dual-gate structure allows disturb-free reading. Multivalued data can also be memorized in an OxiM transistor with a retention time of over 3.5 months.

[1]  M. Alexe,et al.  Device Physics of Ferroelectric Thin-Film Memories , 1999 .

[2]  M. Nakata,et al.  Dual-Gate Characteristics of Amorphous $ \hbox{InGaZnO}_{4}$ Thin-Film Transistors as Compared to Those of Hydrogenated Amorphous Silicon Thin-Film Transistors , 2009, IEEE Transactions on Electron Devices.

[3]  D. G. Baik,et al.  Application of sol-gel derived films for ZnO/n-Si junction solar cells , 1999 .

[4]  Shigeki Sakai,et al.  Fabrication and characterization of sub-0.6-µm ferroelectric-gate field-effect transistors , 2010 .

[5]  E. Tokumitsu,et al.  Use of ferroelectric gate insulator for thin film transistors with ITO channel , 2005 .

[6]  William D. Brown,et al.  Nonvolatile Semiconductor Memory Technology , 1997 .

[7]  J. Colinge.  Silicon-on-Insulator Technology: Materials to VLSI , 1991 .

[8]  H. Koinuma,et al.  Single crystalline ZnO films grown on lattice-matched ScAlMgO4(0001) substrates , 1999 .

[9]  Yang‐Kyu Choi,et al.  Universal Potential Model in Tied and Separated Double-Gate MOSFETs With Consideration of Symmetric and Asymmetric Structure , 2008, IEEE Transactions on Electron Devices.

[10]  Shigeki Sakai,et al.  Self-Aligned-Gate Metal/Ferroelectric/Insulator/Semiconductor Field-Effect Transistors with Long Memory Retention , 2005 .

[11]  S. Sakai,et al.  Metal-ferroelectric-insulator-semiconductor memory FET with long retention and high endurance , 2004, IEEE Electron Device Letters.

[12]  R. McLean,et al.  Transparent ZnO thin-film transistor fabricated by rf magnetron sputtering , 2003 .

[13]  Chung‐Chih Wu,et al.  Scaling behavior of ZnO transparent thin-film transistors , 2006 .

[14]  T. Kanashima,et al.  Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric–Insulator Interface Conduction , 2006 .

[15]  M. Okano,et al.  Surface conduction on insulating BaTiO3 crystal suggesting an intrinsic surface electron layer. , 2001, Physical review letters.

[16]  Masashi Kawasaki,et al.  High Mobility Thin Film Transistors with Transparent ZnO Channels , 2003 .

[17]  S. Im,et al.  Threshold voltage control in dual gate ZnO-based thin-film transistors operating at 5 V , 2008 .

[18]  K. Takeuchi,et al.  Operational method of a ferroelectric (Fe)-NAND flash memory array , 2009 .

[19]  Yasuo Cho,et al.  Actual information storage with a recording density of 4 Tbit∕in. in a ferroelectric recording medium. , 2010, Applied physics letters.

[20]  Y. Kato,et al.  Nonvolatile Memory Using Epitaxially Grown Composite-Oxide-Film Technology , 2008 .

[21]  H. Ishiwara,et al.  Thirty-Day-Long Data Retention in Ferroelectric-Gate Field-Effect Transistors with HfO2 Buffer Layers , 2005 .

[22]  Ken Takeuchi,et al.  Ferroelectric (Fe)-NAND Flash Memory With Batch Write Algorithm and Smart Data Store to the Nonvolatile Page Buffer for Data Center Application High-Speed and Highly Reliable Enterprise Solid-State Drives , 2010, IEEE Journal of Solid-State Circuits.

[23]  Jung Wook Lim,et al.  Novel organic inverters with dual-gate pentacene thin-film transistor , 2007 .

[24]  Hiroyuki Tanaka,et al.  A Ferroelectric Gate Field Effect Transistor with a ZnO/Pb(Zr,Ti)O3 Heterostructure Formed on a Silicon Substrate , 2008 .

[25]  M. Alexe.  Measurement of interface trap states in metal–ferroelectric–silicon heterostructures , 1998 .

[26]  George J. Papaioannou,et al.  Characterization of double gate TFTs fabricated in advanced SLS ELA polycrystalline silicon films , 2007 .

[27]  Shigeki Sakai,et al.  Characterization of Pt∕SrBi2Ta2O9∕Hf–Al–O∕Si field-effect transistors at elevated temperatures , 2006 .

[28]  S. Sakaia,et al.  Highly Scalable Fe(Ferroelectric)-NAND Cell with MFIS(Metal-Ferroelectric-Insulator-Semiconductor) Structure for Sub-10nm Tera-Bit Capacity NAND Flash Memories , 2008, 2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design.

[29]  NOR-Type Nonvolatile Ferroelectric-Gate Memory Cell Using Composite Oxide Technology , 2009 .

[30]  M. Okuyama,et al.  Proposal for a New Ferroelectric Gate Field Effect Transistor Memory Based on Ferroelectric-Insulator Interface Conduction , 2004 .

[31]  Shu-Yau Wu,et al.  A new ferroelectric memory device, metal-ferroelectric-semiconductor transistor , 1974 .