FPGA Based Digital System for Detection of Dicrotic Notch in the Carotid Pulse Signal

Heart disease is one of the leading causes of death in human beings. A survey shows every year about 900,000 peoples die due to heart diseases worldwide. Carotid pulse is a pressure signal recorded over the carotid artery as it passes near the surface of the body at the neck. An abnormal carotid pulse called the dicrotic pulse occurs when patients suffer from sepsis, hypovolemic shock, cardiac tamponade, aortic stenosis. Dicrotic notch usually denotes a very low stroke volume, particularly in patients with dilated cardiomyopathy. Lehner and Rangayyan proposed a methodology to detect this dicrotic notch in the carotid pulse signal. This method used the least-squares estimate of the second derivative because a first-derivative operation would give an almost-constant output for the downward slope. In this paper, a digital system is designed to detect the dicrotic notch in the carotid pulse using Verilog Hardware Description Language. Hardware description languages such as Verilog differ from software programming languages because they include ways of describing the propagation of time and signal dependencies (sensitivity). Verilog modules that conform to a synthesizable coding-style, known as RTL (register transfer level), can be physically realized by synthesis software. Synthesis-software algorithmically transforms the Verilog source code into a netlist, a logically-equivalent description consisting only of elementary logic primitives (AND, OR, NOT, flip-flops, etc.) that are available in a specific FPGA or VLSI technology. Further manipulations to the netlist ultimately lead to a circuit fabrication blueprint. Here architecture of a digital system for detection of dicrotic notch in the carotid pulse signal has been proposed by using Verilog HDL based XILINX FPGA board. By this system patients can check his carotid pulse immediately after he feel sick without getting himself admitted in hospital which can save many lives.