Methodology for Analyzing and Mapping Complex Algorithms for Small Satellites

One of the main challenges in the fleld of space science is the mapping of complex control algorithms onto appropriate hardware architectures. There sometimes exist a wide knowledge gap between the system designer and the hardware/software design engineer whose role is to determine the hardware/software architecture for implementing these control algorithms. In the design process various design tools are used for mapping these complex algorithms onto appropriate hardware architectures. Although the tools speed up the design process, they often prove to be ine‐cient. With the availability of a large suite of architectures and design tools, the designer often gets puzzled in selecting the correct architecture and tools to perform the implementation of the algorithm in an optimal manner. There are a number of requirements which have to be met while implementing an algorithm on particular hardware architecture. These requirements depend upon the application for which the implementation is targeted. For small satellites, these requirements include time-to-launch, feature ∞exibility, cost, real time constraints, minimum power dissipation, reconflgurability and small area. This paper presents a directed methodology for analyzing and mapping complex control algorithms onto appropriate hardware for small satellites. This proposed methodology starts with the identiflcation of the candidate hardware architectures for implementing the algorithm. After selecting appropriate hardware architecture, it provides a directed ∞ow with decision making at several stages, which ultimately leads to a flnal design that meets all the requirements. The methodology has been validated by applying it to the complex Attitude Determination and Control algorithm designed for small satellites.