论文信息 - A Configurable Target Architecture for Rapid Prototyping High Performance Control Systems

A Configurable Target Architecture for Rapid Prototyping High Performance Control Systems

Embedded hard real{time control systems show growing functional complexity as well as increasing demand for short response times and high computing performance. This paper presents a target system architecture suitable for rapid proto-typing embedded real{time applications. The tightly coupled heterogeneous multiprocessor system includes state{of{the{art high performance microprocessors as well as Conngurable I/O processors based on eld programmable gate arrays. It is designed to allow better performance guarantees by simplifying the prediction of tight worst case execution times, which are the base for the schedulability analysis of the tasks executed on the microprocessor based nodes. The Conngurable I/O processors are used for both interacting with the embedding system and processing tasks with deadlines too short to be met by software. The automated transformation of the system speciication and the possibility to connect the prototype to the embedding process allows the validation of the speciication regarding function as well as timing constraints. This work was supported with funds of the Deutsche Forschungsgemeinschaft under reference number Fa 109/11-1 within the priority program \Rapid Prototyping for Embedded Hard Real{Time Systems."

Georg Färber | Annette Muth | Franz Fischer | Thomas Kolloch

[1] Gaetano Borriello,et al. The Chinook hardware/software co-synthesis system , 1995 .

[2] Mani B. Srivastava,et al. SIERA: a unified framework for rapid-prototyping of system-level hardware and software , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3] Jeffrey C. Mogul,et al. The effect of context switches on cache performance , 1991, ASPLOS IV.

[4] Klaus Gresser,et al. An Event Model for Deadline Verification of Hard Real-Time Systems , 1993, Fifth Euromicro Workshop on Real-Time Systems.

[5] Giovanni De Micheli,et al. A co-synthesis approach to embedded system design automation , 1996, Des. Autom. Embed. Syst..

[6] Klaus Gresser,et al. Echtzeitnachweis ereignisgesteuerter Realzeitsysteme , 1993 .

[7] Sang Lyul Min,et al. Worst case timing analysis of RISC processors: R3000/R3010 case study , 1995, Proceedings 16th IEEE Real-Time Systems Symposium.

[8] H. Thielen. AUTOMATED DESIGN OF DISTRIBUTED COMPUTER CONTROL SYSTEMS WITH PREDICTABLE TIMING BEHAVIOUR , 1994 .

[9] Kevin Jeffay,et al. Scheduling sporadic tasks with shared resources in hard-real-time systems , 1992, [1992] Proceedings Real-Time Systems Symposium.