A 120 mm/sup 2/ 64 Mb NAND flash memory achieving 180 ns/byte effective program speed

Rapidly increasing solid-state mass-storage application areas are requiring low cost, high density flash memories with higher read and program throughputs. This paper describes a 3.3 V-only 64 Mb NAND flash memory fabricated using a 0.4 /spl mu/m single-metal CMOS technology. The read throughput of 40 MB/s is achieved by improving the random access time and by introducing a full-chip burst read. A typical program throughput of 5 MB/s corresponding to 180 ns/byte is achieved by using a narrow incremental step pulse programming (NISPP) technique. A staggered row decoder scheme relaxes layout limitations and improves the random access time.