The Apparatus and Enabling of a Code Balanced System

Success in the embedded world revolves around two key concepts: cost effectiveness and performance. The ability for an operating system to boot quickly combined with speedy application usage at runtime is important with regards to consumer unit adoption. The most common memory sub-system setup in cellular phone architectures today is what is called an eXecute-In-Place architecture. This type of memory sub-system defines the execution of code and data directly from NOR flash memory. An additional memory architecture of choice is called a Store and Download architecture. This is a memory subsystem where the compressed code gets copied to RAM at boot time and executes out of the RAM. This paper explores the addition of a new memory usage model called a code balanced system. The result is a system that combines a small RAM memory requirement with a performance increase for improved targeted application and boot time execution