A 10-b 100-Msample/s pipelined subranging BiCMOS ADC
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[1] W. T. Colleran,et al. A 10 b, 100 Ms/s pipelined A/D converter , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[2] M. J. Chambers,et al. A Precision Monolithic Sample-and-hold For Video Analog-to-digital Converters , 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[3] K. Amano,et al. An 8-bit 20MHz Subranging ADC vith Internal Clamp and S/H Circuits , 1990, IEEE 1990 International Conference on Consumer Electronics.
[4] J. Doernberg,et al. A 10-bit 5-Msample/s CMOS two-step flash ADC , 1989 .
[5] R. Petschacher,et al. A 10-b 75-MSPS subranging A/D converter with integrated sample and hold , 1990 .
[6] Hendrikus J. M. Veendrick,et al. The behaviour of flip-flops used as synchronizers and prediction of their failure rate , 1980 .
[7] B. Zojer,et al. A 10 b 75 MHz subranging A/D converter , 1990, 1990 37th IEEE International Conference on Solid-State Circuits.
[8] Akira Matsuzawa,et al. A 10 b 300 MHz interpolated-parallel A/D converter , 1992, 1992 Symposium on VLSI Circuits Digest of Technical Papers.
[9] Y. Ninomiya. Vlsis for HDTV systems , 1991, 1991 Symposium on VLSI Circuits.
[10] C. Lane. A 10-bit 60 Msps flash ADC , 1989, Proceedings of the Bipolar Circuits and Technology Meeting.