VLSI architecture of burst mode acceleration for 128-bit block ciphers

"Burst mode" is a new cipher mode, which is devised dedicatedly for the high performance implementation of the Advanced Encryption Standard (AES) and other next generation 128-bit block cipher algorithms. In comparison with the conventional modes, the burst mode achieves a considerable increase in the throughput by employing a novel stream cipher mechanism which can encrypt 64 plaintext blocks through 16 times of block cipher encryptions. This paper presents a high performance VLSI architecture of burst mode implemented as an accelerator core running in parallel with a block cipher in software. Implementation results show that this burst mode with the use of this hardware accelerator raises the speed of the software implementation by four times, achieving a maximum rate of 3.4 Gbps.