RealWear: Improving performance and lifetime of SSDs using a NAND aging marker

Abstract Although NAND flash memory has revolutionized how we manage data in modern digital systems, significant improvements are needed in flash-based storage systems to meet the requirements of emerging data-intensive applications. In this paper, we address the problem of NAND aging markers that represent the wearing degree of NAND cells. Since all flash operations are affected by the wearing status of NAND cells, an accurate NAND aging marker is critical to develop flash optimization techniques. From our evaluation study, we first show that the existing P/E cycle-based aging marker ( PeWear ) is inadequate to estimate the actual aging status of NAND blocks, thus losing opportunities for further optimizations. To overcome the limitations of PeWear , we propose a new NAND aging marker, RealWear , based on extensive characterization studies using real 3D TLC flash chips. By considering multiple variables that can affect the NAND cell wear, RealWear can accurately indicate the actual wear status of NAND blocks during run time. Using three case studies, we demonstrate that RealWear is effective in enhancing the lifetime and performance of a flash storage system. Our experimental results showed that RealWear can extend the lifetime of individual NAND blocks by 63% and can reduce the GC overhead by 21%. Furthermore, RealWear significantly mitigates read latency fluctuations, guaranteeing that the read latency can be bounded with at most 2 read retry operations.

[1]  Erez Zadok,et al.  Filebench: A Flexible Framework for File System Benchmarking , 2016, login Usenix Mag..

[2]  Josef Hoschek,et al.  Intrinsic parametrization for approximation , 1988, Comput. Aided Geom. Des..

[3]  Haitao Liu,et al.  A Program Disturb Model and Channel Leakage Current Study for Sub-20 nm nand Flash Cells , 2011, IEEE Transactions on Electron Devices.

[4]  C. Hu,et al.  Deep-trap SILC (stress induced leakage current) model for nominal and weak oxides , 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).

[5]  S. Takagi,et al.  A new I-V model for stress-induced leakage current including inelastic tunneling , 1999 .

[6]  Twins grow apart as they age , 2005 .

[7]  N. Zamani,et al.  Behavior of the Si/SiO2 interface observed by Fowler-Nordheim tunneling , 1982 .

[8]  Carlos Zuppa,et al.  Error estimates for moving least square approximations , 2003 .

[9]  Luca Crippa,et al.  Inside NAND Flash Memories , 2010 .

[10]  Hyungcheol Shin,et al.  Threshold Voltage Fluctuation by Random Telegraph Noise in Floating Gate nand Flash Memory String , 2011, IEEE Transactions on Electron Devices.

[11]  S. Arrhenius Über die Dissociationswärme und den Einfluss der Temperatur auf den Dissociationsgrad der Elektrolyte , 1889 .

[12]  Jian Chen,et al.  Reliability of Flash Nonvolatile Memories , 2001 .

[13]  Shuhei Tanakamaru,et al.  Quick-low-density parity check and dynamic threshold voltage optimization in 1X nm triple-level cell NAND flash memory with comprehensive analysis of endurance, retention-time, and temperature variation , 2016 .

[14]  Sungho Kang,et al.  Data Randomization Scheme for Endurance Enhancement and Interference Mitigation of Multilevel Flash Memory Devices , 2013 .

[15]  E. Blackburn,et al.  A telomeric sequence in the RNA of Tetrahymena telomerase required for telomere repeat synthesis , 1989, Nature.

[16]  Jack W. Szostak,et al.  Cloning yeast telomeres on linear plasmid vectors , 1982, Cell.

[17]  Jihong Kim,et al.  SARO: A State-Aware Reliability Optimization Technique for High Density NAND Flash Memory , 2018, ACM Great Lakes Symposium on VLSI.

[18]  Donggun Park,et al.  Data retention characteristics of sub-100 nm NAND flash memory cells , 2003 .

[19]  Jack C. Lee,et al.  Modeling of stress-induced leakage current in ultrathin oxides with the trap-assisted tunneling mechanism , 1997 .

[20]  Andrea L. Lacaita,et al.  Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices , 2017, Comput..