论文信息 - A pseudo-boolean programming approach for CMOL cell assignment

A pseudo-boolean programming approach for CMOL cell assignment

In this paper, we introduce a pseudo-boolean programming approach to CMOL cell assignment. Unlike the SAT-based method, we encode the CMOL cell assignment problem as pseudo-boolean (PB) constraints; and the problem can be solved by using PB solver. The proposed method is tested on ISCAS benchmarks. Experimental results show that the proposed method has small constraints files, and can deal with some circuits while the SAT-based method can't do.

Yinshui Xia | Lunyao Wang | Xianjian Wang

[1] Niklas Sörensson,et al. Translating Pseudo-Boolean Constraints into SAT , 2006, J. Satisf. Boolean Model. Comput..

[2] Xiaoyu Song,et al. Defect-Tolerant CMOL Cell Assignment via Satisfiability , 2008, IEEE Sensors Journal.

[3] D. Strukov,et al. CMOL: Devices, Circuits, and Architectures , 2006 .

[4] P. R. Stephan,et al. SIS : A System for Sequential Circuit Synthesis , 1992 .

[5] Xiaoyu Song,et al. An Integrated Optimization Approach for Nanohybrid Circuit Cell Mapping , 2011, IEEE Transactions on Nanotechnology.

[6] Ahmad Ayatollahi,et al. CMOL implementation of spiking neurons and spike‐timing dependent plasticity , 2011, Int. J. Circuit Theory Appl..

[7] Dmitri B. Strukov,et al. A reconfigurable architecture for hybrid CMOS/Nanodevice circuits , 2006, FPGA '06.

[8] D. Strukov,et al. CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices , 2005 .

[9] Daniel Le Berre,et al. The Sat4j library, release 2.2 , 2010, J. Satisf. Boolean Model. Comput..

[10] D. Strukov,et al. Defect-tolerant architectures for nanoelectronic crossbar memories. , 2007, Journal of nanoscience and nanotechnology.

[11] Stephanie Kemper. SAT-based Verification for Timed Component Connectors , 2009, Electron. Notes Theor. Comput. Sci..