A universal approach for signal dependent circuit reliability simulation

A simulation framework to capture the dynamic evolution of circuit degradation is described. Instead of using an additional simulation loop to perform reliability verification using degraded parameters, the time dependent parameter degradation can be implemented inside a compact model. The reliability simulation can then be performed in the main simulation loop by incorporating time dependent parameter degradation. A new methodology to evaluate the trace the performance drift under dynamic changing signal based on statically extracted parameters is also described. The framework has been implemented into a circuit simulator to demonstrate its advantages over the existing reliability simulation approach.