An oversampling SAR ADC with 2nd-order interpolation achieving maximum efficiency improvement of 23%

this paper presents a low-power 10-bit 200-kS/s successive approximation register (SAR) analog-to-digital converter (ADC) for biomedical applications. By introducing a prediction logic, the ADC only needs to sample and quantize the difference between the input signal and the prediction value which is a rather low voltage. Thus some comparison cycles can be skipped and the power consumption is greatly saved. Conversion efficiency of the predicting logic with different interpolation orders is analyzed theoretically. The maximum efficiency improvement of 23% could be achieved comparing with that of 0th-order interpolation. A prototype oversampling SAR ADC with 2nd order of interpolation is designed with a standard 180nm CMOS technology. It achieves ENOB of 9.58 with total power of 574 nW and very low figure of merit (FoM) of 3.78 fJ/conv.-step.